The UART disable code was causing a hang and was worked around with a

return that skipped the disable code. This patch removes the return and
fixes the UART disable code.

The problem was that the disable code was ORing bits into the Legacy_IO
MSR causing issues with the LPC SIOs init code that would manifest as a
hang because the IO would not be decoded correctly. ANDing to clear the
bits fixes the issue.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index defb91865710b39117d56cb17bce601d4e4194a5..ef5064a8a8a8ed29bfa7fec0847d55ca465b3ac1 100644 (file)
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -316,9 +316,6 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
 
        } else {
                /* Reset and disable COM1 */
-               printk_err("Not disabling COM1 due to a bug ...\n");
-               /* for now, don't do this! */
-               return;
                msr = rdmsr(MDD_UART1_CONF);
                msr.lo = 1;     // reset
                wrmsr(MDD_UART1_CONF, msr);
@@ -327,7 +324,7 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
 
                /* Disable the IRQ */
                msr = rdmsr(MDD_LEG_IO);
-               msr.lo |= ~(0xF << 16);
+               msr.lo &= ~(0xF << 16);
                wrmsr(MDD_LEG_IO, msr);
        }
 
@@ -391,7 +388,7 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
 
                /* Disable the IRQ */
                msr = rdmsr(MDD_LEG_IO);
-               msr.lo |= ~(0xF << 20);
+               msr.lo &= ~(0xF << 20);
                wrmsr(MDD_LEG_IO, msr);
        }
 }