return ones ^ zeroes;
}
+
static uint32_t pci_moving_config32(struct device *dev, unsigned reg)
{
uint32_t value, ones, zeroes;
return 0;
}
-
/** Given a device and register, read the size of the BAR for that register.
* @param dev Pointer to the device structure
* @param resource Pointer to the resource structure
if (moving) {
resource->size = 1;
resource->align = resource->gran = 0;
- while(!(moving & resource->size)) {
+ while (!(moving & resource->size)) {
resource->size <<= 1;
resource->align += 1;
resource->gran += 1;
dev_path(dev), index, value);
}
resource->flags = 0;
- }
- else if (attr & PCI_BASE_ADDRESS_SPACE_IO) {
+ } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) {
/* An I/O mapped base address */
attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK;
resource->flags |= IORESOURCE_IO;
/* I don't want to deal with 32bit I/O resources */
resource->limit = 0xffff;
- }
- else {
+ } else {
/* A Memory mapped base address */
attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK;
resource->flags |= IORESOURCE_MEM;
if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) {
/* 32bit limit */
resource->limit = 0xffffffffUL;
- }
- else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) {
+ } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) {
/* 1MB limit */
resource->limit = 0x000fffffUL;
- }
- else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) {
+ } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) {
/* 64bit limit */
resource->limit = 0xffffffffffffffffULL;
resource->flags |= IORESOURCE_PCI64;
- }
- else {
+ } else {
/* Invalid value */
resource->flags = 0;
}
return resource;
}
-/** Read the base address registers for a given device.
- * @param dev Pointer to the dev structure
- * @param howmany How many registers to read (6 for device, 2 for bridge)
- */
-static void pci_read_bases(struct device *dev, unsigned int howmany)
-{
- unsigned long index;
-
- for (index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2)); ) {
- struct resource *resource;
- resource = pci_get_resource(dev, index);
- index += (resource->flags & IORESOURCE_PCI64)?8:4;
- }
- compact_resources(dev);
-}
-
-static void pci_read_rom_resource(struct device *dev, unsigned long index)
+static void pci_get_rom_resource(struct device *dev, unsigned long index)
{
struct resource *resource;
- unsigned long value, attr;
+ unsigned long value;
resource_t moving, limit;
/* Initialize the resources to nothing */
/* See which bits move */
moving = pci_moving_config32(dev, index);
/* clear the Enable bit */
- moving = moving & 0xffffffffe;
+ moving = moving & ~PCI_ROM_ADDRESS_ENABLE;
/* Find the resource constraints.
*
if (moving) {
resource->size = 1;
resource->align = resource->gran = 0;
- while(!(moving & resource->size)) {
+ while (!(moving & resource->size)) {
resource->size <<= 1;
resource->align += 1;
resource->gran += 1;
}
resource->limit = limit = moving | (resource->size - 1);
- printk_debug("%s, rom size: %x, limit: %x\n",
- dev_path(dev), resource->size, limit);
}
if (moving == 0) {
} else {
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
}
- compact_resources(dev);
+}
+
+/** Read the base address registers for a given device.
+ * @param dev Pointer to the dev structure
+ * @param howmany How many registers to read (6 for device, 2 for bridge)
+ */
+static void pci_read_bases(struct device *dev, unsigned int howmany, unsigned long rom)
+{
+ unsigned long index;
+ for (index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2)); ) {
+ struct resource *resource;
+ resource = pci_get_resource(dev, index);
+ index += (resource->flags & IORESOURCE_PCI64)?8:4;
+ }
+ if (rom)
+ pci_get_rom_resource(dev, rom);
+
+ compact_resources(dev);
}
static void pci_set_resource(struct device *dev, struct resource *resource);
{
resource_t moving_base, moving_limit, moving;
-
/* See if the bridge I/O resources are implemented */
moving_base = ((uint32_t)pci_moving_config8(dev, PCI_IO_BASE)) << 8;
moving_base |= ((uint32_t)pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16;
moving = moving_base & moving_limit;
/* Initialize the io space constraints on the current bus */
- pci_record_bridge_resource(
- dev, moving, PCI_IO_BASE,
- IORESOURCE_IO, IORESOURCE_IO);
-
+ pci_record_bridge_resource(dev, moving, PCI_IO_BASE,
+ IORESOURCE_IO, IORESOURCE_IO);
/* See if the bridge prefmem resources are implemented */
moving_base = ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16;
moving = moving_base & moving_limit;
/* Initiliaze the prefetchable memory constraints on the current bus */
- pci_record_bridge_resource(
- dev, moving, PCI_PREF_MEMORY_BASE,
- IORESOURCE_MEM | IORESOURCE_PREFETCH,
- IORESOURCE_MEM | IORESOURCE_PREFETCH);
-
+ pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE,
+ IORESOURCE_MEM | IORESOURCE_PREFETCH,
+ IORESOURCE_MEM | IORESOURCE_PREFETCH);
/* See if the bridge mem resources are implemented */
moving_base = ((uint32_t)pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16;
moving = moving_base & moving_limit;
/* Initialize the memory resources on the current bus */
- pci_record_bridge_resource(
- dev, moving, PCI_MEMORY_BASE,
- IORESOURCE_MEM | IORESOURCE_PREFETCH,
- IORESOURCE_MEM);
+ pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE,
+ IORESOURCE_MEM | IORESOURCE_PREFETCH,
+ IORESOURCE_MEM);
compact_resources(dev);
}
{
uint32_t addr;
- pci_read_bases(dev, 6);
-
- pci_read_rom_resource(dev, PCI_ROM_ADDRESS);
+ pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
}
void pci_bus_read_resources(struct device *dev)
uint32_t addr;
pci_bridge_read_bases(dev);
- pci_read_bases(dev, 2);
-
- pci_read_rom_resource(dev, PCI_ROM_ADDRESS1);
+ pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
}
static void pci_set_resource(struct device *dev, struct resource *resource)
*
* @return The maximum bus number found, after scanning all subordinate busses
*/
-unsigned int pci_scan_bus(struct bus *bus,
- unsigned min_devfn, unsigned max_devfn,
- unsigned int max)
+unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn,
+ unsigned int max)
{
unsigned int devfn;
device_t dev;
-kevinh@ispiri.com
*/
-void pci_assign_irqs(unsigned bus, unsigned slot,
- const unsigned char pIntAtoD[4])
+void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4])
{
unsigned functNum;
device_t pdev;
return max;
}
-static int reg_useable(unsigned reg,
- device_t goal_dev, unsigned goal_nodeid, unsigned goal_link)
+static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
+ unsigned goal_link)
{
struct resource *res;
unsigned nodeid, link;
}
#if 0
printk_debug("reg: %02x result: %d gnodeid: %u glink: %u nodeid: %u link: %u\n",
- reg, result,
- goal_nodeid, goal_link,
- nodeid, link);
+ reg, result, goal_nodeid, goal_link, nodeid, link);
#endif
return result;
}
report_resource_stored(dev, resource, buf);
}
+/**
+ *
+ * I tried to reuse the resource allocation code in amdk8_set_resource()
+ * but it is too diffcult to deal with the resource allocation magic.
+ */
static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
{
struct resource *resource;
unsigned link;
uint32_t base, limit;
unsigned reg;
+
+ /* find out which link the VGA card is connected,
+ * we only deal with the 'first' vga card */
for (link = 0; link < dev->links; link++) {
if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
- printk_info("%s: bridge on link %d has VGA device\n",
- dev_path(dev), link);
- printk_info("creating MEM pair for VGA memory\n");
- /* Initialize the io space constraints on the current bus */
- resource = amdk8_find_mempair(dev, nodeid, link);
- printk_info("MEM pair register %x\n", resource->index - 0x100);
- resource->base = 0xa0000;
- resource->size = 0x20000;
- resource->gran = 16;
- resource->align = 16;
- resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
+ break;
}
}
-#if 1
+
+ /* no VGA card installed */
+ if (link == dev->links)
+ return;
+
+ /* allocate a temp resrouce for legacy VGA buffer */
+ resource = amdk8_find_mempair(dev, nodeid, link);
+ resource->base = 0xa0000;
+ resource->size = 0x20000;
+
+ /* write the resource to the hardware */
reg = resource->index & 0xfc;
base = f1_read_config32(reg);
limit = f1_read_config32(reg + 0x4);
f1_write_config32(reg + 0x4, limit);
f1_write_config32(reg, base);
- /* release the resource */
+ /* release the temp resource */
resource->flags = 0;
-#endif
}
+
static void amdk8_set_resources(device_t dev)
{
unsigned nodeid, link;
int i;
/* Find the nodeid */
- nodeid = amdk8_nodeid(dev);
+ nodeid = amdk8_nodeid(dev);
amdk8_create_vga_resource(dev, nodeid);
for (i = 0; i < dev->resources; i++) {
amdk8_set_resource(dev, &dev->resource[i], nodeid);
}
-
- for(link = 0; link < dev->links; link++) {
+
+ for (link = 0; link < dev->links; link++) {
struct bus *bus;
bus = &dev->link[link];
if (bus->children) {
/* Find the already assigned resource pairs */
get_fx_devs();
- for(reg = 0x80; reg <= 0xd8; reg+= 0x08) {
+ for (reg = 0x80; reg <= 0xd8; reg+= 0x08) {
uint32_t base, limit;
base = f1_read_config32(reg);
limit = f1_read_config32(reg + 0x04);
resource->base = 0x400;
resource->limit = 0xffffUL;
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
+
/* Initialize the system wide memory resources constraints */
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
resource->limit = 0xfcffffffffULL;
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
}
-static void ram_resource(device_t dev, unsigned long index,
- unsigned long basek, unsigned long sizek)
+static void ram_resource(device_t dev, unsigned long index,
+ unsigned long basek, unsigned long sizek)
{
struct resource *resource;
#endif
idx = 10;
- for(i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++) {
uint32_t base, limit;
unsigned basek, limitk, sizek;
base = f1_read_config32(0x40 + (i << 3));
{
unsigned reg;
/* Unmap all of the HT chains */
- for(reg = 0xe0; reg <= 0xec; reg += 4) {
+ for (reg = 0xe0; reg <= 0xec; reg += 4) {
f1_write_config32(reg, 0);
}
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
/* Find which cpus are present */
cpu_bus = &dev->link[0];
- for(i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++) {
device_t dev, cpu;
struct device_path cpu_path;
/* Report what I have done */
if (cpu) {
- printk_debug("CPU: %s %s\n",
- dev_path(cpu), cpu->enabled?"enabled":"disabled");
+ printk_debug("CPU: %s %s\n", dev_path(cpu),
+ cpu->enabled?"enabled":"disabled");
}
}
return max;
.read_resources = cpu_bus_noop,
.set_resources = cpu_bus_noop,
.enable_resources = cpu_bus_noop,
- .init = cpu_bus_init,
+ .init = cpu_bus_init,
.scan_bus = cpu_bus_scan,
};
projects / coreboot.git / commitdiff