Following patch flushes the instruction queue when we set PE=0. This is normally

done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many
thanks to Marc and Kevin to tell me how to fix it

The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real
mode to any EIP addresses  ;)

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/arch/i386/boot/wakeup.S b/src/arch/i386/boot/wakeup.S
index 5985c8e1c0224ec1e0847b0536796d5e5d9378f9..7915fc38c52c0a1931c15d52e02ce852c7db86fd 100644 (file)
--- a/src/arch/i386/boot/wakeup.S
+++ b/src/arch/i386/boot/wakeup.S
@@ -45,6 +45,8 @@ reload_cs:
        movl    %cr0, %eax
        andb    $0xfe,%al
        movl    %eax, %cr0
+       ljmpl $0x0, $cpu_flushed
+cpu_flushed:
        movw    $0x0, %ax
        movw    %ax, %ds
        movw    %ax, %es