#define PC_CKS_RANGE_END 45
#define PC_CKS_LOC 46
+/* coreboot cmos checksum is usually only built over bytes 49..125
+ * LB_CKS_RANGE_START, LB_CKS_RANGE_END and LB_CKS_LOC are defined
+ * in option_table.h
+ */
+#if CONFIG_HAVE_OPTION_TABLE
+#include <option_table.h>
+#endif
+
#ifndef UTIL_BUILD_OPTION_TABLE
#include <arch/io.h>
static inline unsigned char cmos_read(unsigned char addr)
string
default amd/dbm690t
+# This is a temporary fix, and should be removed when the race condition for
+# building option_table.h is fixed.
+config WARNINGS_ARE_ERRORS
+ bool
+ default n
+
config DCACHE_RAM_BASE
hex
default 0xc8000
subdirs-y += vga
$(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H)
-$(obj)/pc80/mc146818rtc_early.initobj.o : $(OPTION_TABLE_H)
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
#include <string.h>
-#if CONFIG_USE_OPTION_TABLE
-#include <option_table.h>
-#endif
/* control registers - Moto names
*/
#include <pc80/mc146818rtc.h>
#include <fallback.h>
-#if CONFIG_USE_OPTION_TABLE
-#include <option_table.h>
-#endif
-
#ifndef CONFIG_MAX_REBOOT_CNT
#error "CONFIG_MAX_REBOOT_CNT not defined"
#endif