Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.

Since we have CBFS setting rom_address in board files is no longer
necessary.

Also, drop vga_rom_address from RS690 completely, it was never used
in the code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/amd/dbm690t/Config.lb b/src/mainboard/amd/dbm690t/Config.lb
index 69e34671233159a6ddaaf8eff1cff41ed019ff0a..a40bf65b7d1b812ce91dd7ae4da339f1a29e8c17 100644 (file)
--- a/src/mainboard/amd/dbm690t/Config.lb
+++ b/src/mainboard/amd/dbm690t/Config.lb
@@ -157,7 +157,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913

diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb
index 2e89c13aaf9b61e6ac0ce501770f37bec22143c1..10de5c16c859733593ca018ac4986ee04bd899f2 100644 (file)
--- a/src/mainboard/amd/dbm690t/devicetree.cb
+++ b/src/mainboard/amd/dbm690t/devicetree.cb
@@ -22,7 +22,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913

diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb
index 6ada7d636e5c4a32ffbf589170a52687e3f16fd6..146ab50bf9460af6f60aabd2eb90c85d968f24b3 100644 (file)
--- a/src/mainboard/amd/pistachio/Config.lb
+++ b/src/mainboard/amd/pistachio/Config.lb
@@ -158,7 +158,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913

diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb
index ec16256b2645306963180743b73f9f44a9a290bd..ab915764b388655822f528540a0c0d5916a65a30 100644 (file)
--- a/src/mainboard/amd/pistachio/devicetree.cb
+++ b/src/mainboard/amd/pistachio/devicetree.cb
@@ -23,7 +23,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913

diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb
index 276b4704b329a9fddfe8b8856c9fc410b810725b..7df39865fe20577f28da8c1d4b5aa2bec894f87e 100644 (file)
--- a/src/mainboard/arima/hdama/Config.lb
+++ b/src/mainboard/arima/hdama/Config.lb
@@ -179,7 +179,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end  # LAN
                                                chip drivers/pci/onboard
                                                        device pci 6.0 on end # ATI Rage XL
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                                ## PCI Slot 5 (correct?)
                                                #chip drivers/generic/generic

diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb
index 2552e18cf761e172c26fed9088d455ec57c44626..ac09e730aef102f5d249765fc38689ffc7c6082f 100644 (file)
--- a/src/mainboard/arima/hdama/devicetree.cb
+++ b/src/mainboard/arima/hdama/devicetree.cb
@@ -75,7 +75,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end  # LAN
                                                chip drivers/pci/onboard
                                                        device pci 6.0 on end # ATI Rage XL
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                                ## PCI Slot 5 (correct?)
                                                #chip drivers/generic/generic

diff --git a/src/mainboard/asi/mb_5blmp/Config.lb b/src/mainboard/asi/mb_5blmp/Config.lb
index f344b466fbc8b688f0d488b18532fdc0c0dfe9a0..65e2fd4c0f650dbb71d6c02b5fb14dc59d30716a 100644 (file)
--- a/src/mainboard/asi/mb_5blmp/Config.lb
+++ b/src/mainboard/asi/mb_5blmp/Config.lb
@@ -138,9 +138,6 @@ chip northbridge/amd/gx1            # Northbridge
       # device pci 12.4 on             # VGA (onboard)
       #   chip drivers/pci/onboard
       #     device pci 12.4 on end
-      #     register "rom_address" = "0xfffc0000" # 256 KB image
-      #     # register "rom_address" = "0xfff80000" # 512 KB image
-      #     # register "rom_address" = "0xfff00000" # 1 MB image
       #   end
       # end
       device pci 13.0 on end           # USB

diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb
index 8ec750cda6e72265e604c7c42e9ccc775fccd260..0b1505a13607a161c49b4ad74400bddabb75a14f 100644 (file)
--- a/src/mainboard/asi/mb_5blmp/devicetree.cb
+++ b/src/mainboard/asi/mb_5blmp/devicetree.cb
@@ -40,9 +40,6 @@ chip northbridge/amd/gx1              # Northbridge
       # device pci 12.4 on             # VGA (onboard)
       #   chip drivers/pci/onboard
       #     device pci 12.4 on end
-      #     register "rom_address" = "0xfffc0000" # 256 KB image
-      #     # register "rom_address" = "0xfff80000" # 512 KB image
-      #     # register "rom_address" = "0xfff00000" # 1 MB image
       #   end
       # end
       device pci 13.0 on end           # USB

diff --git a/src/mainboard/asus/mew-vm/Config.lb b/src/mainboard/asus/mew-vm/Config.lb
index 4d51c9971eeb3bc546f86d5ea9eb91663a506cf0..e27f2d12cfbae5b6ba724af0eb8e2500aa94846b 100644 (file)
--- a/src/mainboard/asus/mew-vm/Config.lb
+++ b/src/mainboard/asus/mew-vm/Config.lb
@@ -99,7 +99,6 @@ chip northbridge/intel/i82810
                device pci 1.0 on # Onboard Video
                        #chip drivers/pci/onboard
                        #       device pci 1.0 on end
-                       #       register "rom_address" = "0xfff80000"
                        #end
                end
                chip southbridge/intel/i82801xx # Southbridge
@@ -109,7 +108,6 @@ chip northbridge/intel/i82810
                        device pci 1e.0 on # PCI Bridge
                                #chip drivers/pci/onboard
                                #       device pci 1.0 on end
-                               #       register "rom_address" = "0xfff80000"
                                #end
                        end
                        device pci 1f.0 on  # ISA/LPC? Bridge

diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb
index 5ff718604c6d7c927461591f8c92d876f021ed0c..650aad1c4203cb12dca628368ac0138a63f03d2c 100644 (file)
--- a/src/mainboard/asus/mew-vm/devicetree.cb
+++ b/src/mainboard/asus/mew-vm/devicetree.cb
@@ -4,7 +4,6 @@ chip northbridge/intel/i82810
                device pci 1.0 on # Onboard Video
                        #chip drivers/pci/onboard
                        #       device pci 1.0 on end
-                       #       register "rom_address" = "0xfff80000"
                        #end
                end
                chip southbridge/intel/i82801xx # Southbridge
@@ -14,7 +13,6 @@ chip northbridge/intel/i82810
                        device pci 1e.0 on # PCI Bridge
                                #chip drivers/pci/onboard
                                #       device pci 1.0 on end
-                               #       register "rom_address" = "0xfff80000"
                                #end
                        end
                        device pci 1f.0 on  # ISA/LPC? Bridge

diff --git a/src/mainboard/broadcom/blast/Config.lb b/src/mainboard/broadcom/blast/Config.lb
index e400b958e261fb6d4fce941bd2d45c9b79b6778d..3b0d217437698d15d38e767ad47992460a9ab5a5 100644 (file)
--- a/src/mainboard/broadcom/blast/Config.lb
+++ b/src/mainboard/broadcom/blast/Config.lb
@@ -211,7 +211,6 @@ chip northbridge/amd/amdk8/root_complex
                                         chip drivers/pci/onboard
                                               device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4
-                                              register "rom_address" = "0xfff80000"
                                         end
                                 end
                                         #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,)
@@ -220,7 +219,6 @@ chip northbridge/amd/amdk8/root_complex
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
 

diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb
index 4c35506332cf65afc9c11ac18ad5b60f3cfa7afb..b9dc91b720cfcea1a3a80c0660c4dfe613b2018a 100644 (file)
--- a/src/mainboard/broadcom/blast/devicetree.cb
+++ b/src/mainboard/broadcom/blast/devicetree.cb
@@ -109,7 +109,6 @@ chip northbridge/amd/amdk8/root_complex
                                         chip drivers/pci/onboard
                                               device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4
-                                              register "rom_address" = "0xfff80000"
                                         end
                                 end
                                         #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,)
@@ -118,7 +117,6 @@ chip northbridge/amd/amdk8/root_complex
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
 

diff --git a/src/mainboard/digitallogic/msm586seg/Config.lb b/src/mainboard/digitallogic/msm586seg/Config.lb
index f223884883a9da6ecb8f219296e53f624a47010d..ef8a0eb69c633c66e3fbb97bf9bf6efc4ccfd2a8 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/Config.lb
+++ b/src/mainboard/digitallogic/msm586seg/Config.lb
@@ -108,7 +108,6 @@ chip cpu/amd/sc520
                end
                chip drivers/pci/onboard
                        device pci 14.0 on end # 69000
-                       register "rom_address" = "0x2000000"
                end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"

diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb
index 30606b5b7e22ea5127110ad7f08d0b3f7d2abefc..35db84ed8bd49d175d564cb179a6573f1ac6b415 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/devicetree.cb
+++ b/src/mainboard/digitallogic/msm586seg/devicetree.cb
@@ -7,7 +7,6 @@ chip cpu/amd/sc520
                end
                chip drivers/pci/onboard
                        device pci 14.0 on end # 69000
-                       register "rom_address" = "0x2000000"
                end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb
index 17223bd430f133f37e14a6e887d1ee0f6c9d16b9..b043e275b59d93df750d8033359c6b6d416783dc 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb
@@ -180,7 +180,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on               # AGP bridge
                                          chip drivers/pci/onboard      # Integrated VGA
                                                device pci 0.0 on end
-                                               register "rom_address" = "0xfff80000"
                                          end
                                        end
                                        device pci 2.0 on # LPC

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb
index b7cc72f29308d91790205ec8b7dced27023d88f1..5ab88f4a39bd95effa93b15fb2e93185e2759227 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb
+++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb
@@ -13,7 +13,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on               # AGP bridge
                                          chip drivers/pci/onboard      # Integrated VGA
                                                device pci 0.0 on end
-                                               register "rom_address" = "0xfff80000"
                                          end
                                        end
                                        device pci 2.0 on # LPC

diff --git a/src/mainboard/hp/e_vectra_p2706t/Config.lb b/src/mainboard/hp/e_vectra_p2706t/Config.lb
index 0677bbb00c449269773165b350f260bd64a85a7d..535c30caa0ac508f031915caff7152495a0610a6 100644 (file)
--- a/src/mainboard/hp/e_vectra_p2706t/Config.lb
+++ b/src/mainboard/hp/e_vectra_p2706t/Config.lb
@@ -78,7 +78,6 @@ chip northbridge/intel/i82810                 # Northbridge
     device pci 0.0 on end                      # Host bridge
     chip drivers/pci/onboard                   # Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"    # 512 KB image
     end
     chip southbridge/intel/i82801xx            # Southbridge
       register "ide0_enable" = "1"

diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
index e049c6b46d0e7364fe3fa9a2c1472ef6f5a714e2..a10dee89fcc8488cd601f44573ea17e4153712d5 100644 (file)
--- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
+++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
@@ -9,7 +9,6 @@ chip northbridge/intel/i82810                   # Northbridge
     device pci 0.0 on end                      # Host bridge
     chip drivers/pci/onboard                   # Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"    # 512 KB image
     end
     chip southbridge/intel/i82801xx            # Southbridge
       register "ide0_enable" = "1"

diff --git a/src/mainboard/ibm/e326/Config.lb b/src/mainboard/ibm/e326/Config.lb
index c21a315acd2e2ca3c5994335f6853c89edf6ec04..39ba3e2fad162c8634af295002f1a7f31152cfcc 100644 (file)
--- a/src/mainboard/ibm/e326/Config.lb
+++ b/src/mainboard/ibm/e326/Config.lb
@@ -127,7 +127,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end # ATI Rage XL
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb
index 11c57e87a3e0a211b84ce3bb08a7221538dec89e..2e634e0058953b73fcd14970982dbcfacc573fa9 100644 (file)
--- a/src/mainboard/ibm/e326/devicetree.cb
+++ b/src/mainboard/ibm/e326/devicetree.cb
@@ -23,7 +23,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end # ATI Rage XL
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/intel/d945gclf/Config.lb b/src/mainboard/intel/d945gclf/Config.lb
index 7e59a47810892bed5f8e4b680eed4c3d67e5dd22..d9eee75168e2670382e88eaeec2e9cf38c27b2de 100644 (file)
--- a/src/mainboard/intel/d945gclf/Config.lb
+++ b/src/mainboard/intel/d945gclf/Config.lb
@@ -152,9 +152,6 @@ chip northbridge/intel/i945
                device pci 01.0 off end # i945 PCIe root port
                chip drivers/pci/onboard
                        device pci 02.0 on end # vga controller
-                       # register "rom_address" = "0xfffc0000" # 256 KB image
-                       # register "rom_address" = "0xfff80000" # 512 KB image
-                       # register "rom_address" = "0xfff00000" # 1 MB image
                end
                device pci 02.1 on end # display controller
 

diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb
index ea84556ea34feea666b3fc2890b76da8829985f2..eeab074f56e7c832020ba074d94fa695e8b23548 100644 (file)
--- a/src/mainboard/intel/d945gclf/devicetree.cb
+++ b/src/mainboard/intel/d945gclf/devicetree.cb
@@ -30,9 +30,6 @@ chip northbridge/intel/i945
                device pci 01.0 off end # i945 PCIe root port
                chip drivers/pci/onboard
                        device pci 02.0 on end # vga controller
-                       # register "rom_address" = "0xfffc0000" # 256 KB image
-                       # register "rom_address" = "0xfff80000" # 512 KB image
-                       # register "rom_address" = "0xfff00000" # 1 MB image
                end
                device pci 02.1 on end # display controller
 

diff --git a/src/mainboard/iwill/dk8_htx/Config.lb b/src/mainboard/iwill/dk8_htx/Config.lb
index b6ea0e291dc2246e0199af34e7ce8159ed22bf91..fc55d57a23ea1ef7bd5fbd7e2a51423f12b996dd 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/Config.lb
+++ b/src/mainboard/iwill/dk8_htx/Config.lb
@@ -234,7 +234,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 #chip drivers/pci/onboard
                                                 #        device pci 6.0 on end
-                                               #       register "rom_address" = "0xfff80000"
                                                 #end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb
index 0d02cc8b59e0bb8655bd9f179f7e959d06028791..b1d0d79bf18f7bbdc41c95dffc3f61c5c256b16b 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/devicetree.cb
+++ b/src/mainboard/iwill/dk8_htx/devicetree.cb
@@ -26,7 +26,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 #chip drivers/pci/onboard
                                                 #        device pci 6.0 on end
-                                               #       register "rom_address" = "0xfff80000"
                                                 #end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/kontron/986lcd-m/Config.lb b/src/mainboard/kontron/986lcd-m/Config.lb
index eab88a9589e1c331497e8c77c18ff8d89845eacd..e89fc82c0e5f3e4320efe7dab12269934cac75e3 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/Config.lb
+++ b/src/mainboard/kontron/986lcd-m/Config.lb
@@ -155,9 +155,6 @@ chip northbridge/intel/i945
                # device pci 01.0 off end # i945 PCIe root port
                chip drivers/pci/onboard
                        device pci 02.0 on end # vga controller
-                       # register "rom_address" = "0xfffc0000" # 256 KB image
-                       # register "rom_address" = "0xfff80000" # 512 KB image
-                       register "rom_address" = "0xfff00000" # 1 MB image
                end
                device pci 02.1 on end # display controller
 

diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index 2a3615bf5db1c5f815bbcdf9941b88f7067b36a2..8cd34b4f964611f313148accbec848b449148166 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -11,9 +11,6 @@ chip northbridge/intel/i945
                device pci 01.0 off end # i945 PCIe root port
                chip drivers/pci/onboard
                        device pci 02.0 on end # vga controller
-                       # register "rom_address" = "0xfffc0000" # 256 KB image
-                       # register "rom_address" = "0xfff80000" # 512 KB image
-                       register "rom_address" = "0xfff00000" # 1 MB image
                end
                device pci 02.1 on end # display controller
 

diff --git a/src/mainboard/kontron/kt690/Config.lb b/src/mainboard/kontron/kt690/Config.lb
index f1b4215aa491ac9ca9fd8171954cb38ceb4e1077..3a182b7ba96a9bf18fa1a6fb518e9015a78ca6cb 100644 (file)
--- a/src/mainboard/kontron/kt690/Config.lb
+++ b/src/mainboard/kontron/kt690/Config.lb
@@ -134,7 +134,6 @@ config chip.h
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff0000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                                         1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,7 +157,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -168,7 +166,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff00000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb
index e26350ccdabe138ce39c81df2dc23b811eda2c00..5983bbafd942eaf5c4c57a43adc127622b691619 100644 (file)
--- a/src/mainboard/kontron/kt690/devicetree.cb
+++ b/src/mainboard/kontron/kt690/devicetree.cb
@@ -1,5 +1,4 @@
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff0000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                                         1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,7 +22,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -33,7 +31,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff00000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/mitac/6513wu/Config.lb b/src/mainboard/mitac/6513wu/Config.lb
index c008f99a2b046bd236f6e816f0a9f4e391eb1faa..9072349fc5c4b7be1295b9ab5d851b329b309cd9 100644 (file)
--- a/src/mainboard/mitac/6513wu/Config.lb
+++ b/src/mainboard/mitac/6513wu/Config.lb
@@ -82,7 +82,6 @@ chip northbridge/intel/i82810           # Northbridge
     device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
     chip drivers/pci/onboard
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000" # 512 KB image
     end
     chip southbridge/intel/i82801xx     # Southbridge
       register "pirqa_routing" = "0x03"

diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb
index 0731b2f2cdb37dbf5884072a1fed4bdb7bdaa1cb..b78dd3aab949b5ec4b8e32c8e3cabe9d465d947d 100644 (file)
--- a/src/mainboard/mitac/6513wu/devicetree.cb
+++ b/src/mainboard/mitac/6513wu/devicetree.cb
@@ -28,7 +28,6 @@ chip northbridge/intel/i82810           # Northbridge
     device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
     chip drivers/pci/onboard
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000" # 512 KB image
     end
     chip southbridge/intel/i82801xx     # Southbridge
       register "pirqa_routing" = "0x03"

diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb
index d8cea81e89636af06c024e3cd12446ba2f415b3a..5c6f9c06bcd4a06d4a68e780e6f80b54755dc27d 100644 (file)
--- a/src/mainboard/msi/ms6178/Config.lb
+++ b/src/mainboard/msi/ms6178/Config.lb
@@ -77,7 +77,6 @@ chip northbridge/intel/i82810                 # Northbridge
     device pci 0.0 on end                      # Host bridge
     chip drivers/pci/onboard                   # Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"    # 512 KB image
     end
     chip southbridge/intel/i82801xx            # Southbridge
       register "ide0_enable" = "1"

diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb
index ac56d65b6116be8077c2a846a71a664a9ac48363..1676ab5a9af4310d128ebedcb37bb695bde17c35 100644 (file)
--- a/src/mainboard/msi/ms6178/devicetree.cb
+++ b/src/mainboard/msi/ms6178/devicetree.cb
@@ -28,7 +28,6 @@ chip northbridge/intel/i82810                 # Northbridge
     device pci 0.0 on end                      # Host bridge
     chip drivers/pci/onboard                   # Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"    # 512 KB image
     end
     chip southbridge/intel/i82801xx            # Southbridge
       register "ide0_enable" = "1"

diff --git a/src/mainboard/msi/ms9185/Config.lb b/src/mainboard/msi/ms9185/Config.lb
index c02f260fe9256be70d1938c9969962a3f8f481bc..0af1b60c4cea89371cb25e0132f2fcba9fdb9e31 100644 (file)
--- a/src/mainboard/msi/ms9185/Config.lb
+++ b/src/mainboard/msi/ms9185/Config.lb
@@ -211,7 +211,6 @@ chip northbridge/amd/amdk8/root_complex
                                         chip drivers/pci/onboard
                                               device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3
-                                              register "rom_address" = "0xfff80000"
                                         end
                                        #bx_a013+ start
                                        #chip drivers/pci/onboard    #SATA2
@@ -229,7 +228,6 @@ chip northbridge/amd/amdk8/root_complex
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
                        end #  device pci 18.0

diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb
index 23f6c8747cd3b2105e812b177dbb6d980fd86dc5..3f02199d691ab73ecc63522628cdd32303795397 100644 (file)
--- a/src/mainboard/msi/ms9185/devicetree.cb
+++ b/src/mainboard/msi/ms9185/devicetree.cb
@@ -77,7 +77,6 @@ chip northbridge/amd/amdk8/root_complex
                                         chip drivers/pci/onboard
                                               device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3
-                                              register "rom_address" = "0xfff80000"
                                         end
                                        #bx_a013+ start
                                        #chip drivers/pci/onboard    #SATA2
@@ -95,7 +94,6 @@ chip northbridge/amd/amdk8/root_complex
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
                        end #  device pci 18.0

diff --git a/src/mainboard/msi/ms9282/Config.lb b/src/mainboard/msi/ms9282/Config.lb
index c5a82d3ad44ea27cec91ab5559b54b5fb77f6495..c0c4ed10e642f4cfc6bf901335d765b08a034fef 100644 (file)
--- a/src/mainboard/msi/ms9282/Config.lb
+++ b/src/mainboard/msi/ms9282/Config.lb
@@ -280,7 +280,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  #P2P
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end # P2P
                                        device pci 7.0 on end # reserve

diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb
index 6fd476b10a27a56c096f5ff4715462233406b2a1..bf334408e8981a9487b63d163aad2dec316da505 100644 (file)
--- a/src/mainboard/msi/ms9282/devicetree.cb
+++ b/src/mainboard/msi/ms9282/devicetree.cb
@@ -139,7 +139,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  #P2P
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end # P2P
                                        device pci 7.0 on end # reserve

diff --git a/src/mainboard/nec/powermate2000/Config.lb b/src/mainboard/nec/powermate2000/Config.lb
index 02be04a21ba2fe931f366f16016f8b521adf56ba..ff7543772003e0e94c5697f7d0fbe81f1c938593 100644 (file)
--- a/src/mainboard/nec/powermate2000/Config.lb
+++ b/src/mainboard/nec/powermate2000/Config.lb
@@ -78,7 +78,6 @@ chip northbridge/intel/i82810                 # Northbridge
     device pci 1.0 off                         # Onboard video
       # chip drivers/pci/onboard
       #   device pci 1.0 on end
-      #   register "rom_address" = "0xfff80000"
       # end
     end
     chip southbridge/intel/i82801xx            # Southbridge

diff --git a/src/mainboard/nec/powermate2000/devicetree.cb b/src/mainboard/nec/powermate2000/devicetree.cb
index cbbc322a24948eac2a75fbdb8e9afc06b731c5f2..5af5986a5afb5735515d978b669df2a1edab0a8d 100644 (file)
--- a/src/mainboard/nec/powermate2000/devicetree.cb
+++ b/src/mainboard/nec/powermate2000/devicetree.cb
@@ -9,7 +9,6 @@ chip northbridge/intel/i82810                   # Northbridge
     device pci 1.0 off                         # Onboard video
       # chip drivers/pci/onboard
       #   device pci 1.0 on end
-      #   register "rom_address" = "0xfff80000"
       # end
     end
     chip southbridge/intel/i82801xx            # Southbridge

diff --git a/src/mainboard/rca/rm4100/Config.lb b/src/mainboard/rca/rm4100/Config.lb
index 87d96df2e1922a9199a5a2b2dc53fe9cd035cbe0..727077d6be8fab96a60e3b9fd9664f5b239a4ecc 100644 (file)
--- a/src/mainboard/rca/rm4100/Config.lb
+++ b/src/mainboard/rca/rm4100/Config.lb
@@ -77,7 +77,6 @@ chip northbridge/intel/i82830         # Northbridge
     device pci 0.0 on end              # Host bridge
     chip drivers/pci/onboard           # Onboard VGA
       device pci 2.0 on end            # VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx    # Southbridge
       register "pirqa_routing" = "0x05"

diff --git a/src/mainboard/rca/rm4100/devicetree.cb b/src/mainboard/rca/rm4100/devicetree.cb
index 09d1e2b6358d3b4e22e3cea746f766dca0ce03c7..f67692d8df64fb08af8faa44ec1b2a285f93aead 100644 (file)
--- a/src/mainboard/rca/rm4100/devicetree.cb
+++ b/src/mainboard/rca/rm4100/devicetree.cb
@@ -3,7 +3,6 @@ chip northbridge/intel/i82830           # Northbridge
     device pci 0.0 on end              # Host bridge
     chip drivers/pci/onboard           # Onboard VGA
       device pci 2.0 on end            # VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx    # Southbridge
       register "pirqa_routing" = "0x05"

diff --git a/src/mainboard/supermicro/h8dme/Config.lb b/src/mainboard/supermicro/h8dme/Config.lb
index b9f14ea4c9cc44afa0cc42542a0e2beccdb14658..2bc901af1089179f83ce344a3d1c0333a2443c32 100644 (file)
--- a/src/mainboard/supermicro/h8dme/Config.lb
+++ b/src/mainboard/supermicro/h8dme/Config.lb
@@ -256,8 +256,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb
index 90491e45ed894f3670812b49c486a0ddbb6d25bb..6df22c4f444760996c2f0431bc032d702ae7b577 100644 (file)
--- a/src/mainboard/supermicro/h8dme/devicetree.cb
+++ b/src/mainboard/supermicro/h8dme/devicetree.cb
@@ -94,8 +94,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/supermicro/h8dmr/Config.lb b/src/mainboard/supermicro/h8dmr/Config.lb
index a93c3051c3780d6c66e73ac44225785c3da84bd6..76f8e70aa150d1a28250c996964f1b147c68af83 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/Config.lb
+++ b/src/mainboard/supermicro/h8dmr/Config.lb
@@ -278,8 +278,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb
index 9f5fd765bfe0865c2c869948054f23d0581fe83c..9a09f1cc495de5a395bd779730477adc055b533a 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/devicetree.cb
+++ b/src/mainboard/supermicro/h8dmr/devicetree.cb
@@ -114,8 +114,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/supermicro/h8dmr_fam10/Config.lb b/src/mainboard/supermicro/h8dmr_fam10/Config.lb
index 945662d135e996a087f61e2a047a60c1ce77fec3..31341bd0e13de1bee3f4ccc42936b54b0256be06 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/Config.lb
+++ b/src/mainboard/supermicro/h8dmr_fam10/Config.lb
@@ -282,8 +282,6 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
index 584f48abd64dfe9b72d5c4b2727a5c859bbb6bb6..35cf05235f08813e03477b7d88a9625433bd2af1 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
+++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
@@ -116,8 +116,6 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
                                        end
                                        device pci 6.1 on end # AZA

diff --git a/src/mainboard/technexion/tim5690/Config.lb b/src/mainboard/technexion/tim5690/Config.lb
index d46aa3ba6110d7a72b41312c6fcc124537ffbfd6..d400a2d6c9adbd4681443d12165fcd4bd1e6c014 100644 (file)
--- a/src/mainboard/technexion/tim5690/Config.lb
+++ b/src/mainboard/technexion/tim5690/Config.lb
@@ -134,7 +134,6 @@ config chip.h
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                      1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,10 +157,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff80000" #512KB
-                                                       #register "rom_address" = "0xfff00000" #1024KB
-                                                       #register "rom_address" = "0xffe00000" #2048KB
-                                                       #register "rom_address" = "0xffc00000" #4096KB
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -171,10 +166,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff80000"
-                                       #register "vga_rom_address" = "0xfff00000"
-                                       #register "vga_rom_address" = "0xffe00000"
-                                       #register "vga_rom_address" = "0xffc00000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb
index fb95aad887e0b1177c8addc821a88bf3911e841f..8bd6fe1f9d6bcbb355c364621120030e6674dccc 100644 (file)
--- a/src/mainboard/technexion/tim5690/devicetree.cb
+++ b/src/mainboard/technexion/tim5690/devicetree.cb
@@ -1,5 +1,4 @@
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                      1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,10 +22,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff80000" #512KB
-                                                       #register "rom_address" = "0xfff00000" #1024KB
-                                                       #register "rom_address" = "0xffe00000" #2048KB
-                                                       #register "rom_address" = "0xffc00000" #4096KB
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -36,10 +31,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff80000"
-                                       #register "vga_rom_address" = "0xfff00000"
-                                       #register "vga_rom_address" = "0xffe00000"
-                                       #register "vga_rom_address" = "0xffc00000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/technexion/tim8690/Config.lb b/src/mainboard/technexion/tim8690/Config.lb
index e69d01df601811a930d4d2a91a004b1b6ed57e58..a40bf65b7d1b812ce91dd7ae4da339f1a29e8c17 100644 (file)
--- a/src/mainboard/technexion/tim8690/Config.lb
+++ b/src/mainboard/technexion/tim8690/Config.lb
@@ -134,7 +134,6 @@ config chip.h
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                                         1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,7 +157,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -168,7 +166,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff80000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb
index b47e615e2dd30f8440e04f399d11c98b7ae434d3..10de5c16c859733593ca018ac4986ee04bd899f2 100644 (file)
--- a/src/mainboard/technexion/tim8690/devicetree.cb
+++ b/src/mainboard/technexion/tim8690/devicetree.cb
@@ -1,5 +1,4 @@
 #Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #                      1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,7 +22,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
                                                chip drivers/pci/onboard
                                                        device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -33,7 +31,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff80000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"

diff --git a/src/mainboard/technologic/ts5300/Config.lb b/src/mainboard/technologic/ts5300/Config.lb
index 9f9e3417845d16a1a9bdb86f20ac4a369528ee22..5b665f9ad7581a04bb455a1cdeb22ab8d4530532 100644 (file)
--- a/src/mainboard/technologic/ts5300/Config.lb
+++ b/src/mainboard/technologic/ts5300/Config.lb
@@ -109,7 +109,6 @@ chip cpu/amd/sc520
 #              end
 #              chip drivers/pci/onboard
 #                      device pci 14.0 on end # 69000
-#                      register "rom_address" = "0x2000000"
 #              end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"

diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb
index 4e752516c79c18fb8b8646e61d86675eae8ea2b8..5823155cdbdba91c96e0428664f83ab4f81d1cdf 100644 (file)
--- a/src/mainboard/technologic/ts5300/devicetree.cb
+++ b/src/mainboard/technologic/ts5300/devicetree.cb
@@ -7,7 +7,6 @@ chip cpu/amd/sc520
 #              end
 #              chip drivers/pci/onboard
 #                      device pci 14.0 on end # 69000
-#                      register "rom_address" = "0x2000000"
 #              end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"

diff --git a/src/mainboard/thomson/ip1000/Config.lb b/src/mainboard/thomson/ip1000/Config.lb
index 00c913cfcc0877e3b96195839cf8a73c06ae2228..8eaa606ac49ac3edfe1d721ad6f54708d638b94d 100644 (file)
--- a/src/mainboard/thomson/ip1000/Config.lb
+++ b/src/mainboard/thomson/ip1000/Config.lb
@@ -77,7 +77,6 @@ chip northbridge/intel/i82830         # Northbridge
     device pci 0.0 on end              # Host bridge
     chip drivers/pci/onboard           # Onboard VGA
       device pci 2.0 on end            # VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx    # Southbridge
       register "pirqa_routing" = "0x05"

diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb
index c3e0e7f8fe402a4e5849a27e92998c9cf08e5c40..aa0f3f93daa61056355c5888b7ff83c74e35695c 100644 (file)
--- a/src/mainboard/thomson/ip1000/devicetree.cb
+++ b/src/mainboard/thomson/ip1000/devicetree.cb
@@ -3,7 +3,6 @@ chip northbridge/intel/i82830           # Northbridge
     device pci 0.0 on end              # Host bridge
     chip drivers/pci/onboard           # Onboard VGA
       device pci 2.0 on end            # VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx    # Southbridge
       register "pirqa_routing" = "0x05"

diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb
index 19f637fd2975a6b1b2d72025e4ce686a5308d869..3eeb4319cb41a5f3714754557e042693ca58dfc2 100644 (file)
--- a/src/mainboard/tyan/s2850/Config.lb
+++ b/src/mainboard/tyan/s2850/Config.lb
@@ -121,7 +121,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 #chip drivers/ati/ragexl
                                                chip drivers/pci/onboard
                                                         device pci b.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb
index ebb4fe60f826c790d634cfb06dd0945b3d4538db..1f93df19d3eba85e819807c9f9c5257174ed4a1e 100644 (file)
--- a/src/mainboard/tyan/s2850/devicetree.cb
+++ b/src/mainboard/tyan/s2850/devicetree.cb
@@ -19,7 +19,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 #chip drivers/ati/ragexl
                                                chip drivers/pci/onboard
                                                         device pci b.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2875/Config.lb b/src/mainboard/tyan/s2875/Config.lb
index 63ea6be2cb044fe6de5b24d6ee3ea4676f799fc0..f0d93d0b80091a6eee22e60174e24b8d037f1625 100644 (file)
--- a/src/mainboard/tyan/s2875/Config.lb
+++ b/src/mainboard/tyan/s2875/Config.lb
@@ -125,7 +125,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb
index 1b4bb28c38da22135f51ecd73ee979dd1b676eae..6c6bf69cfa1b3ffeedcab0fe4c2f8cfc632425c4 100644 (file)
--- a/src/mainboard/tyan/s2875/devicetree.cb
+++ b/src/mainboard/tyan/s2875/devicetree.cb
@@ -23,7 +23,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb
index 692184b18ee4bc48705af200ca178f801bfaf96d..76018b156d61dc95584e53d204f694357212bbd1 100644 (file)
--- a/src/mainboard/tyan/s2880/Config.lb
+++ b/src/mainboard/tyan/s2880/Config.lb
@@ -140,7 +140,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end #adti
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb
index 9d1e44c974b34631bd956956bbed44c65bf19cc3..8593fb357341334513ede46e92ef90f0e91e76c8 100644 (file)
--- a/src/mainboard/tyan/s2880/devicetree.cb
+++ b/src/mainboard/tyan/s2880/devicetree.cb
@@ -38,7 +38,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end #adti
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2881/Config.lb b/src/mainboard/tyan/s2881/Config.lb
index 92f50f8effecd43efe3a7c731c799ccc27b54aa0..b959220f72fce25ba27a7655db14f2d9836ca1a1 100644 (file)
--- a/src/mainboard/tyan/s2881/Config.lb
+++ b/src/mainboard/tyan/s2881/Config.lb
@@ -141,7 +141,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb
index 57673a9bea77272ab425539ad871d46a0707fa89..7f1453bfa31d2dcc6bdd010c419feea6ae30029b 100644 (file)
--- a/src/mainboard/tyan/s2881/devicetree.cb
+++ b/src/mainboard/tyan/s2881/devicetree.cb
@@ -39,7 +39,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb
index 34b2e82a74edba1e738de556247b452fba9d77f0..e92ea849487fae97b4c52fde8ccac8994b6cbd71 100644 (file)
--- a/src/mainboard/tyan/s2882/Config.lb
+++ b/src/mainboard/tyan/s2882/Config.lb
@@ -141,7 +141,6 @@ chip northbridge/amd/amdk8/root_complex
                                         #       chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff00000"
                                                 end
                                                 chip drivers/pci/onboard 
                                                         device pci 8.0 on end #intel 10/100

diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb
index 3c18bb6fd2104585de7063d9459f3b107e8de8f2..d4200d158e5e798a01d6d2abdccfe34d3ec80b12 100644 (file)
--- a/src/mainboard/tyan/s2882/devicetree.cb
+++ b/src/mainboard/tyan/s2882/devicetree.cb
@@ -39,7 +39,6 @@ chip northbridge/amd/amdk8/root_complex
                                         #       chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff00000"
                                                 end
                                                 chip drivers/pci/onboard 
                                                         device pci 8.0 on end #intel 10/100

diff --git a/src/mainboard/tyan/s2912_fam10/Config.lb b/src/mainboard/tyan/s2912_fam10/Config.lb
index 799931c521298360b4210bed067a5bce34909e44..49ae429bf54f3f2834c07d55b0d80490fae1c664 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/Config.lb
+++ b/src/mainboard/tyan/s2912_fam10/Config.lb
@@ -281,7 +281,6 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 6.0 on
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end # PCI
                                        device pci 6.1 off end # AZA

diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb
index d02b81c2fd3685116cdb9c3e15e08d83482a77f4..4bce6b3e8913c5acf7d137fd0e89f4459dc828e0 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/devicetree.cb
+++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb
@@ -114,7 +114,6 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 6.0 on
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff00000"
                                                end
                                        end # PCI
                                        device pci 6.1 off end # AZA

diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb
index 1838733d7ccb17ed88cd3c24d32dafc132ad9b44..68efa3bba82cf4bb5a32ee51d0495af683daa78f 100644 (file)
--- a/src/mainboard/tyan/s4880/Config.lb
+++ b/src/mainboard/tyan/s4880/Config.lb
@@ -135,7 +135,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb
index 7dec1bcd108229a6096de7e6dad79b64bf8bf3d2..d1e424b697aadd25af4a5e6cb537234051b97608 100644 (file)
--- a/src/mainboard/tyan/s4880/devicetree.cb
+++ b/src/mainboard/tyan/s4880/devicetree.cb
@@ -38,7 +38,6 @@ chip northbridge/amd/amdk8/root_complex
                                                device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                        end
                                        device pci 1.0 on

diff --git a/src/mainboard/tyan/s4882/Config.lb b/src/mainboard/tyan/s4882/Config.lb
index f28c752078622f21ecf2b743e2ff309699b154ee..48b2597451091a4c6b6e81251d62e598154f1fb3 100644 (file)
--- a/src/mainboard/tyan/s4882/Config.lb
+++ b/src/mainboard/tyan/s4882/Config.lb
@@ -134,7 +134,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 #chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end #SiI

diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb
index 1524a845c182ada79e9b1a09c892c9b9fb17a6e6..d61865cdd53b168e65c7d8b591df4cadfa374b10 100644 (file)
--- a/src/mainboard/tyan/s4882/devicetree.cb
+++ b/src/mainboard/tyan/s4882/devicetree.cb
@@ -37,7 +37,6 @@ chip northbridge/amd/amdk8/root_complex
                                                 #chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end #SiI

diff --git a/src/mainboard/via/vt8454c/Config.lb b/src/mainboard/via/vt8454c/Config.lb
index f685ddd3e45fb6a05e77bdbf10d64c34cdd7bcce..3dd107ac52a1e7a4e438b6b961e786f40fed4062 100644 (file)
--- a/src/mainboard/via/vt8454c/Config.lb
+++ b/src/mainboard/via/vt8454c/Config.lb
@@ -123,9 +123,6 @@ chip northbridge/via/cx700
                device pci 1.0 on     # PCI Bridge
                        chip drivers/pci/onboard
                                device pci 0.0 on end
-                               #register "rom_address" = "0xfffc0000" #256k image
-                               register "rom_address" = "0xfff80000" #512k image
-                               #register "rom_address" = "0xfff00000" #1024k image
                        end # Onboard Video
                end # PCI Bridge
                device pci f.0 on end # IDE/SATA

diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb
index 02f951498467c2498d8a44641e9ab9e8e0fe23a3..3ef59b52e17b0ec8a3a614a51ed2ce9469a86375 100644 (file)
--- a/src/mainboard/via/vt8454c/devicetree.cb
+++ b/src/mainboard/via/vt8454c/devicetree.cb
@@ -14,9 +14,6 @@ chip northbridge/via/cx700
                device pci 1.0 on     # PCI Bridge
                        chip drivers/pci/onboard
                                device pci 0.0 on end
-                               #register "rom_address" = "0xfffc0000" #256k image
-                               register "rom_address" = "0xfff80000" #512k image
-                               #register "rom_address" = "0xfff00000" #1024k image
                        end # Onboard Video
                end # PCI Bridge
                device pci f.0 on end # IDE/SATA

diff --git a/src/southbridge/amd/rs690/chip.h b/src/southbridge/amd/rs690/chip.h
index 176b744fe077d6589c19e05505ad8489c42786de..6ae3dd5a0f403ac557163e4d07c5adaf5463f555 100644 (file)
--- a/src/southbridge/amd/rs690/chip.h
+++ b/src/southbridge/amd/rs690/chip.h
@@ -23,7 +23,6 @@
 /* Member variables are defined in Config.lb. */
 struct southbridge_amd_rs690_config
 {
-       u32 vga_rom_address;            /* The location that the VGA rom has been appened. */
        u8 gpp_configuration;   /* The configuration of General Purpose Port, A/B/C/D/E. */
        u8 port_enable;         /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
        u8 gfx_dev2_dev3;       /* for GFX Core initialization REFCLK_SEL */