This patch reverts SuperIO changes that I was too hasty with. Even though the

address of the RTC is 0x70, you need to write 0x400 to it.  Now the dump from
superiotool matches the factory except 0xf0 of the keyboard.  When you boot with
the factory BIOS that is 0x04, but with coreboot it is not set.

It's trivial because it is reverts.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/tyan/s2895/Config.lb b/src/mainboard/tyan/s2895/Config.lb
index 1ac890c00d55bc8d96c5ac38a3117daec0c82d18..78fc5b7378e9644a39063b7d318f75f152bba310 100644 (file)
--- a/src/mainboard/tyan/s2895/Config.lb
+++ b/src/mainboard/tyan/s2895/Config.lb
@@ -269,7 +269,7 @@ chip northbridge/amd/amdk8/root_complex
                                                        device pnp 2e.3 on #  Parallel Port
                                                                io 0x60 = 0x378
                                                                irq 0x70 = 7
-                                                               drq 0x74 = 3
+                                                               drq 0x74 = 4
                                                        end
                                                        device pnp 2e.4 on #  Com1
                                                                io 0x60 = 0x3f8
@@ -286,7 +286,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                irq 0x72 = 12
                                                        end
                                                        device pnp 2e.8 on # HW Monitor
-                                                               io 0x60 = 0x290
+                                                               io 0x60 = 0x480
                                                                chip drivers/generic/generic # LM95221 CPU temp
                                                                        device i2c 2b on end
                                                                end
@@ -295,8 +295,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                end
                                                        end
                                                        device  pnp 2e.a on #  RT
-                                                               io 0x60 = 0x90
-                                                               irq 0x70 = 8
+                                                               io 0x60 = 0x400
                                                        end
                                                end
                                        end

diff --git a/src/mainboard/tyan/s2895/dsdt.dsl b/src/mainboard/tyan/s2895/dsdt.dsl
index b449064954a0e63e555f785ce2ab6045c06680c7..597d41e5896ee850f27aaa81e0f8b8b9434be67e 100644 (file)
--- a/src/mainboard/tyan/s2895/dsdt.dsl
+++ b/src/mainboard/tyan/s2895/dsdt.dsl
@@ -188,7 +188,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE  ", "CB-DSDT ", 1)
                                        Method (_CRS, 0, NotSerialized)
                                        {
                                                Name (TMP, ResourceTemplate () {
-                                                       FixedIO (0x0090, 0x02)
+                                                       FixedIO (0x0070, 0x02)
                                                        IRQNoFlags () {8}
                                                })
                                                Return (TMP)

diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
index e0f5d7975f1d77016f181170d4426d1ada5cefd4..5dc8e1f37663136278ce210d2679042e460fb2b2 100644 (file)
--- a/src/superio/smsc/lpc47b397/superio.c
+++ b/src/superio/smsc/lpc47b397/superio.c
@@ -202,7 +202,7 @@ static struct pnp_info pnp_dev_info[] = {
        { &ops, LPC47B397_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
        { &ops, LPC47B397_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
        { &ops_hwm, LPC47B397_HWM,  PNP_IO0, { 0x7f0, 0 }, },
-       { &ops, LPC47B397_RT,   PNP_IO0 | PNP_IRQ0, { 0x7fc, 0 }, },
+       { &ops, LPC47B397_RT,   PNP_IO0, { 0x780, 0 }, },
 };
 
 static void enable_dev(struct device *dev)