dir /pc80
config chip.h
-northbridge via/vt8601 "vt8601"
-# pci 0:0.0
-# pci 0:1.0
- southbridge via/vt8231 "vt8231"
-# pci 0:11.0
-# pci 0:11.1
-# pci 0:11.2
-# pci 0:11.3
-# pci 0:11.4
-# pci 0:11.5
-# pci 0:11.6
-# pci 0:12.0
+northbridge via/vt8623 "vt8623"
+ southbridge via/vt8235 "vt8235"
register "enable_usb" = "0"
register "enable_native_ide" = "0"
register "enable_com_ports" = "1"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-#include "northbridge/via/vt8601/raminit.h"
+#include "northbridge/via/vt8623/raminit.h"
#include "cpu/p6/earlymtrr.c"
/*
#include "cpu/p6/boot_cpu.c"
#include "debug.c"
-#include "southbridge/via/vt8231/vt8231_early_smbus.c"
+#include "southbridge/via/vt8231/vt8235_early_smbus.c"
-#include "southbridge/via/vt8231/vt8231_early_serial.c"
+#include "southbridge/via/vt8231/vt8235_early_serial.c"
static void memreset_setup(void)
{
}
device_t dev;
/* dev 0 for southbridge */
- dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
+ dev = pci_locate_device(PCI_ID(0x1106,0x8235), 0);
if (dev == PCI_DEV_INVALID) {
die("Southbridge not found!!!\n");
/* init_timer();*/
outb(5, 0x80);
- enable_vt8231_serial();
+ enable_vt8235_serial();
uart_init();
console_init();
}
struct chip_control mainboard_via_epia_control = {
.enumerate = enumerate,
- .name = "VIA EPIA mainboard ",
+ .name = "VIA EPIA-M mainboard ",
};
-struct northbridge_via_vt8601_config
+struct northbridge_via_vt8623_config
{
};
-extern struct chip_control northbridge_via_vt8601_control;
+extern struct chip_control northbridge_via_vt8623_control;
static void random_fixup() {
device_t pcidev = dev_find_slot(0, 0);
- printk_spew("VT8601 random fixup ...\n");
+ printk_spew("VT8623 random fixup ...\n");
if (pcidev) {
pci_write_config8(pcidev, 0x70, 0xc0);
pci_write_config8(pcidev, 0x71, 0x88);
static void northbridge_init(struct chip *chip, enum chip_pass pass)
{
- struct northbridge_via_vt8601_config *conf =
- (struct northbridge_via_vt8601_config *)chip->chip_info;
+ struct northbridge_via_vt8623_config *conf =
+ (struct northbridge_via_vt8623_config *)chip->chip_info;
switch (pass) {
case CONF_PASS_PRE_PCI:
}
}
-struct chip_control northbridge_via_vt8601_control = {
+struct chip_control northbridge_via_vt8623_control = {
.enumerate = enumerate,
.enable = northbridge_init,
- .name = "VIA vt8601 Northbridge",
+ .name = "VIA vt8623 Northbridge",
};
-#ifndef NORTHBRIDGE_VIA_VT8601_H
-#define NORTHBRIDGE_VIA_VT8601_H
+#ifndef NORTHBRIDGE_VIA_VT8623_H
+#define NORTHBRIDGE_VIA_VT8623_H
-extern unsigned int vt8601_scan_root_bus(device_t root, unsigned int max);
+extern unsigned int vt8623_scan_root_bus(device_t root, unsigned int max);
-#endif /* NORTHBRIDGE_VIA_VT8601_H */
+#endif /* NORTHBRIDGE_VIA_VT8623_H */
device_t north = (device_t) 0;
uint8_t c, r;
- print_err("vt8601 init starting\r\n");
- north = pci_locate_device(PCI_ID(0x1106, 0x8601), 0);
+ print_err("vt8623 init starting\r\n");
+ north = pci_locate_device(PCI_ID(0x1106, 0x8623), 0);
north = 0;
print_debug_hex32(north);
print_debug(" is the north\n");
print_debug(" is the MA type\r\n");
set_ma_mapping(north, slot, ma);
}
- print_err("vt8601 done\r\n");
+ print_err("vt8623 done\r\n");
dumpnorth(north);
}
-# Sample config file for EPIA
-# This will make a target directory of ./epia.512kflash
+# Sample config file for EPIA-M
+# This will make a target directory of ./epia-m.512kflash
loadoptions
-target epia.512kflash
+target epia-m.512kflash
uses ARCH
uses CONFIG_COMPRESS
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Normal"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../../lnxieepro100.ebi
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../../lnxieepro100.ebi
-# Sample config file for EPIA
-# This will make a target directory of ./epia
+# Sample config file for EPIA-M
+# This will make a target directory of ./epia-m
loadoptions
-target epia
+target epia-m
uses ARCH
uses CONFIG_COMPRESS
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Normal"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
# payload ../../../../../lnxieepro100.ebi
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
# payload ../../../../../lnxieepro100.ebi
-# Sample config file for EPIA
-# This will make a target directory of ./epia
+# Sample config file for EPIA-M
+# This will make a target directory of ./epia-m
loadoptions
-target epia
+target epia-m
uses ARCH
uses CONFIG_COMPRESS
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Normal"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../../lnxieepro100.ebi
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
- mainboard via/epia
+ mainboard via/epia-m
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../../lnxieepro100.ebi