config AGP_APERTURE_SIZE
hex
default 0x4000000
-
-config HAVE_HIGH_TABLES
- int
- default 1
\end{verbatim}
\subsubsection{northbridge/$<$vendor$>$/$<$chip$>$/Makefile.inc}
Typically very small set of rules, and very simple.
#
# endmenu
-#TODO Remove this option or make it useful.
-config HAVE_LOW_TABLES
- bool
- default y
- help
- This Option is unused in the code. Since two boards try to set it to
- 'n', they may be broken. We either need to make the option useful or
- get rid of it. The broken boards are:
- asus/m2v-mx_se
- supermicro/h8dme
-
-config HAVE_HIGH_TABLES
- bool
- default y
- help
- This variable specifies whether a given northbridge has high table
- support.
- It is set in northbridge/*/Kconfig.
- Whether or not the high tables are actually written by coreboot is
- configurable by the user via WRITE_HIGH_TABLES.
-
config HAVE_ACPI_TABLES
bool
help
bool
default HAVE_PIRQ_TABLE
-config WRITE_HIGH_TABLES
- bool
- default HAVE_HIGH_TABLES
-
menu "System tables"
config WRITE_HIGH_TABLES
bool "Write 'high' tables to avoid being overwritten in F segment"
- depends on HAVE_HIGH_TABLES
default y
config MULTIBOOT
default amd/dbm690t
depends on BOARD_AMD_DBM690T
-config HAVE_HIGH_TABLES
- bool
- default n
- depends on BOARD_AMD_DBM690T
-
# This is a temporary fix, and should be removed when the race condition for
# building option_table.h is fixed.
config WARNINGS_ARE_ERRORS
default amd/mahogany
depends on BOARD_AMD_MAHOGANY
-config HAVE_HIGH_TABLES
- bool
- default n
- depends on BOARD_AMD_MAHOGANY
-
config DCACHE_RAM_BASE
hex
default 0xc8000
default asrock/939a785gmh
depends on BOARD_ASROCK_939A785GMH
-config HAVE_HIGH_TABLES
- bool
- default n
- depends on BOARD_ASROCK_939A785GMH
-
config DCACHE_RAM_BASE
hex
default 0xc8000
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
- select HAVE_HIGH_TABLES
select HYPERTRANSPORT_PLUGIN_SUPPORT
select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
- select HAVE_HIGH_TABLES
select HYPERTRANSPORT_PLUGIN_SUPPORT
config AGP_APERTURE_SIZE
config NORTHBRIDGE_AMD_LX
bool
- select HAVE_HIGH_TABLES
select GEODE_VSA
config VIDEO_MB
config NORTHBRIDGE_INTEL_E7501
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_E7520
bool
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_E7525
bool
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_I3100
bool
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_I440BX
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
config SDRAMPWR_4DIMM
bool
config NORTHBRIDGE_INTEL_I440LX
bool
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_I82810
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
choice
prompt "Onboard graphics"
config NORTHBRIDGE_INTEL_I82830
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
choice
prompt "Onboard graphics"
config NORTHBRIDGE_INTEL_I855
bool
- select HAVE_HIGH_TABLES
config NORTHBRIDGE_INTEL_I945
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
config FALLBACK_VGA_BIOS_ID
string
config NORTHBRIDGE_VIA_CN400
bool
-config FALLBACK_SIZE
- int
- default 0
- depends on NORTHBRIDGE_VIA_CN400
-
# TODO: Values are from the CX700 datasheet, not sure if this matches CN400.
# TODO: What should be the per-chipset default value here?
choice
mainboard_interrupt_handlers(0x15, &via_cn400_int15_handler);
-#undef OLD_BOCHS_METHOD
-#ifdef OLD_BOCHS_METHOD
- u32 temp;
- // XXX We might need more bios hooks in the f segment, but
- // this way of copying the BOCHS BIOS does not work anymore.
- // As soon as someone verifies that CN400 can init VGA, the
- // code should be removed.
- temp = (0xffffffff - CONFIG_FALLBACK_SIZE - 0xffff);
- printk(BIOS_DEBUG, "Copying BOCHS BIOS from 0x%08X to 0xf000\n", temp);
- /*
- * Copy BOCHS BIOS from 4G-CONFIG_FALLBACK_SIZE-64k (in flash) to 0xf0000 (in RAM)
- * This is for compatibility with the VGA ROM's BIOS callbacks.
- */
- //memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000);
- memcpy((void *)0xf0000, (void *)temp, 0x10000);
-#endif
-
/* Set memory rate to 200 MHz. */
outb(0x3d, CRTM_INDEX);
reg8 = inb(CRTM_DATA);
outb(0x39, SR_INDEX);
outb(reg8, SR_DATA);
-#ifdef OLD_BOCHS_METHOD
- /* Clear the BOCHS BIOS out of memory, so it doesn't confuse Linux. */
- memset((void *)0xf0000, 0, 0x10000);
-#endif
-
#ifdef DEBUG_CN400
int i, j;
config NORTHBRIDGE_VIA_CN700
bool
select HAVE_DEBUG_RAM_SETUP
- select HAVE_HIGH_TABLES
config FALLBACK_SIZE
int
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
- select HAVE_HIGH_TABLES
select HAVE_HARD_RESET
select IOAPIC
select SMP
config NORTHBRIDGE_VIA_VT8601
bool
- select HAVE_HIGH_TABLES
-
-config FALLBACK_SIZE
- int
- default 0
- depends on NORTHBRIDGE_VIA_VT8601
config NORTHBRIDGE_VIA_VT8623
bool
- select HAVE_HIGH_TABLES
-
-config FALLBACK_SIZE
- int
- default 0
- depends on NORTHBRIDGE_VIA_VT8623
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
-config FALLBACK_SIZE
- int
- default 0
- depends on NORTHBRIDGE_VIA_VX800
-