Set to \texttt{1} to use Cache As Ram (CAR). Defaults to \texttt{0}
-\item \begin{verbatim}CONFIG_USE_INIT\end{verbatim}
-
-Set to \texttt{1} to figure this out. Defaults to \texttt{0}
-
-\item \begin{verbatim}CONFIG_USE_PRINTK_IN_CAR\end{verbatim}
-
-Set to \texttt{1} to use printk, instead of the primitive print functions, in CAR. Defaults to \texttt{0}
-
\end{itemize}
Before going over the new image types, derived from v3, we will quickly review the standard v2 image types. We are hoping this review will
No significant change from romcc code.
\subsubsection{boot sequence}
No significant change from romcc code, except that the CAR code has to set up a stack.
-\subsection{car + CONFIG\_USE\_PRINTK\_IN\_CAR images}
-When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c:
-\begin{verbatim}
-#if CONFIG_USE_PRINTK_IN_CAR == 0
-static void __console_tx_byte(unsigned char byte)
-{
- uart_tx_byte(byte);
-}
-
-#include "console_print.c"
-
-#else
-/* CONFIG_USE_PRINTK_IN_CAR == 1 */
-
-#include "console_printk.c"
-
-#if CONFIG_USE_INIT == 0
-// do_printk
-#include "../../../console/vtxprintf.c"
-#include "printk_init.c"
-#endif
-
-#endif /* CONFIG_USE_PRINTK_IN_CAR */
-
-\end{verbatim}\footnote{yuck!}
-
-If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently:
-\begin{verbatim}
-if CONFIG_USE_INIT
- if CONFIG_USE_PRINTK_IN_CAR
- initobject printk_init.o
- end
-end
-
-\end{verbatim}\footnote{see previous footnote}
\subsubsection{layout}
No significant change from romcc code.
hex
default 0x4000
-config USE_PRINTK_IN_CAR
- bool
- default n
-
config MAX_CPUS
int
default 1
config CPU_AMD_MODEL_10XXX
bool
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select SSE
select SSE2
config CPU_AMD_MODEL_FXX
bool
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select MMX
select SSE
select CPU_INTEL_MODEL_68X
select MMX
select SSE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select TINY_BOOTBLOCK
select UDELAY_TSC
select MMX
select SSE2
- select USE_PRINTK_IN_CAR
config DCACHE_RAM_BASE
hex
#ifndef __ASSERT_H__
#define __ASSERT_H__
-#if defined(__PRE_RAM__) && !CONFIG_USE_PRINTK_IN_CAR
+#if defined(__PRE_RAM__) && !CONFIG_USE_DCACHE_RAM
/* ROMCC versions */
#define ASSERT(x) { \
static void report_bist_failure(u32 bist)
{
if (bist != 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_EMERG, "BIST failed: %08x", bist);
#else
print_emerg("BIST failed: ");
static inline void print_debug_sdram_8(const char *strval, uint32_t val)
{
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%s%02x\n", strval, val);
#else
print_debug(strval); print_debug_hex8(val); print_debug("\n");
/*
* Fill.
*/
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM fill: ");
for(addr = start; addr < stop ; addr += 4) {
/* Display address being filled */
if (!(addr & 0xfffff)) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
write_phys(addr, (u32)addr);
};
/* Display final address */
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr);
#else
print_debug_hex32(addr);
/*
* Verify.
*/
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM verify: ");
unsigned long value;
/* Display address being tested */
if (!(addr & 0xfffff)) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
value = read_phys(addr);
if (value != addr) {
/* Display address with error */
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value);
#else
print_err("Fail: @0x");
#endif
i++;
if(i>256) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "Aborting.\n");
#else
print_debug("Aborting.\n");
}
}
/* Display final address */
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%08lx", addr);
#else
print_debug_hex32(addr);
#endif
if (i) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
#else
print_debug("\nDRAM did _NOT_ verify!\n");
die("DRAM ERROR");
}
else {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\nDRAM range verified.\n");
#else
print_debug("\nDRAM range verified.\n");
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop);
#else
print_debug("Testing DRAM : ");
/* Make sure we don't read before we wrote */
phys_memory_barrier();
ram_verify(start, stop);
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "Done.\n");
#else
print_debug("Done.\n");
#if !defined(__ROMCC__)
#include <console/console.h>
#else
-#if CONFIG_USE_PRINTK_IN_CAR==0
+#if CONFIG_USE_DCACHE_RAM==0
#define printk(BIOS_DEBUG, fmt, arg...) do {} while(0)
#endif
#endif
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
select HAVE_OPTION_TABLE
select HAVE_MAINBOARD_RESOURCES
select HAVE_BUS_CONFIG
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_MAINBOARD_RESOURCES
select HAVE_BUS_CONFIG
select LIFT_BSP_APIC_ID
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select GENERATE_PIRQ_TABLE
select GENERATE_MP_TABLE
- select USE_PRINTK_IN_CAR
select HAVE_MAINBOARD_RESOURCES
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select SOUTHBRIDGE_AMD_CS5536
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c"
void hardwaremain(int ret_addr)
{
- struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
- struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
+ struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE +
+ CONFIG_DCACHE_RAM_SIZE -
+ CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
+ struct sys_info *sysinfox = ((CONFIG_RAMTOP) -
+ CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
struct node_core_id id;
id = get_node_core_id_x();
-#if CONFIG_USE_PRINTK_IN_CAR
- printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n");
-#else
- print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-#endif
+ printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
train_ram(id.nodeid, sysinfo, sysinfox);
/*
- go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
- */
+ * go back, but can not use stack any more, because we
+ * only keep ret_addr and can not restore esp, and ebp.
+ */
__asm__ volatile (
"movl %0, %%edi\n\t"
"jmp *%%edi\n\t"
:: "a"(ret_addr)
);
-
-
-
}
#include <arch/registers.h>
} while(1);
}
-
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select GENERATE_PIRQ_TABLE
select GENERATE_MP_TABLE
- select USE_PRINTK_IN_CAR
select HAVE_MAINBOARD_RESOURCES
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select HAVE_PIRQ_TABLE
select HAVE_OPTION_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
select HAVE_OPTION_TABLE
select HAVE_BUS_CONFIG
select LIFT_BSP_APIC_ID
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
default 0x0
depends on BOARD_ASROCK_939A785GMH
-config USE_INIT
- bool
- default n
- depends on BOARD_ASROCK_939A785GMH
-
config IRQ_SLOT_COUNT
int
default 11
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8T890
select SUPERIO_WINBOND_W83627EHG
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES
select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8M890
select SUPERIO_ITE_IT8712F
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select HAVE_PIRQ_TABLE
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_1024
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select TINY_BOOTBLOCK
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
select HAVE_ACPI_SLIC
select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select AP_IN_SIPI_WAIT
select UDELAY_LAPIC
select HAVE_SMI_HANDLER
select HAVE_BUS_CONFIG
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_ACPI_RESUME
select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_512
select USE_DCACHE_RAM
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
select HAVE_ACPI_RESUME
select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select HAVE_ACPI_TABLES
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_512
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select UDELAY_TSC
select AP_IN_SIPI_WAIT
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_PIRQ_TABLE
select HAVE_OPTION_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_ACPI_RESUME
select HAVE_MAINBOARD_RESOURCES
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_1024
select USE_DCACHE_RAM
select HAVE_MP_TABLE
select HAVE_MAINBOARD_RESOURCES
select GFXUMA
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select HAVE_ACPI_TABLES
select SOUTHBRIDGE_AMD_CS5535
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select K8_REV_F_SUPPORT
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_OPTION_TABLE
select HAVE_HARD_RESET
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select SOUTHBRIDGE_AMD_CS5536
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
select SOUTHBRIDGE_AMD_CS5536
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
select BOARD_ROMSIZE_KB_1024
select HAVE_HARD_RESET
select HAVE_MAINBOARD_RESOURCES
- select USE_PRINTK_IN_CAR
select HAVE_SMI_HANDLER
select GFXUMA
select USE_DCACHE_RAM
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select MMCONF_SUPPORT
- select USE_PRINTK_IN_CAR
select HAVE_SMI_HANDLER
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_1024
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
#select AP_CODE_IN_CAR
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select BOARD_ROMSIZE_KB_512
select HAVE_HARD_RESET
select HAVE_MAINBOARD_RESOURCES
- select USE_PRINTK_IN_CAR
select HAVE_SMI_HANDLER
select GFXUMA
select USE_DCACHE_RAM
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR
select USE_DCACHE_RAM
select USE_WATCHDOG_ON_BOOT
select BOARD_ROMSIZE_KB_512
- select USE_PRINTK_IN_CAR
config MAINBOARD_DIR
string
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select PIRQ_ROUTE
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
select SOUTHBRIDGE_AMD_CS5536
select UDELAY_TSC
select USE_DCACHE_RAM
- select USE_PRINTK_IN_CAR
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select BOARD_ROMSIZE_KB_256
for(i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\n%02x:",i);
#else
print_debug("\n");
#endif
}
val = pci_read_config8(dev, i);
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, " %02x", val);
#else
print_debug_char(' ');
device = ctrl->channel0[i];
if (device) {
int j;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
#else
print_debug("dimm: ");
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
break;
}
byte = status & 0xff;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
device = ctrl->channel1[i];
if (device) {
int j;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
#else
print_debug("dimm: ");
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
break;
}
byte = status & 0xff;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
for(device = 1; device < 0x80; device++) {
int j;
if( smbus_read_byte(device, 0) < 0 ) continue;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "smbus: %02x", device);
#else
print_debug("smbus: ");
break;
}
if ((j & 0xf) == 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\n%02x: ",j);
#else
print_debug("\n");
#endif
}
byte = status & 0xff;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
{
int i;
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%04x:\n", port);
#else
print_debug_hex16(port);
for(i=0;i<256;i++) {
uint8_t val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "%02x:", i);
#else
print_debug_hex8(i);
#endif
}
val = inb(port);
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, " %02x",val);
#else
print_debug_char(' ');
print_debug("dump_mem:");
for(i=start;i<end;i++) {
if((i & 0xf)==0) {
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, "\n%08x:", i);
#else
print_debug("\n");
print_debug(":");
#endif
}
-#if CONFIG_USE_PRINTK_IN_CAR
+#if CONFIG_USE_DCACHE_RAM
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
#else
print_debug(" ");
#define UART_LCS CONFIG_TTYS0_LCS
-#if CONFIG_USE_PRINTK_IN_CAR == 0
+#if CONFIG_USE_DCACHE_RAM == 0
/* Data */
#define UART_RBR 0x00
}
#else
-/* CONFIG_USE_PRINTK_IN_CAR == 1 */
+/* CONFIG_USE_DCACHE_RAM == 1 */
extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs);
void uart_init(void)
projects / coreboot.git / commitdiff