drop __ROMCC__ define checks.. __PRE_RAM__ is what the code should be looking for.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/southbridge/amd/cs5530/cs5530.h b/src/southbridge/amd/cs5530/cs5530.h
index 283b64de3374de2a7144f0e16b05c6aa42dc8bba..e95d88e15b1fb4813075548b1ba6c0038ad7fe24 100644 (file)
--- a/src/southbridge/amd/cs5530/cs5530.h
+++ b/src/southbridge/amd/cs5530/cs5530.h
@@ -21,7 +21,7 @@
 #ifndef SOUTHBRIDGE_AMD_CS5530_CS5530_H
 #define SOUTHBRIDGE_AMD_CS5530_CS5530_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 void cs5530_enable(device_t dev);
 #endif

diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index f105571380f9dfa571a24133c134ad7223d89107..cb4356ef8ae252de36affb2e4e314e94d36f6d6c 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -21,7 +21,7 @@
 #ifndef SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H
 #define SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 void i82371eb_enable(device_t dev);
 void i82371eb_hard_reset(void);

diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h
index 7df86d2f23167101248502f4f094abd0bcab08eb..2ead33f02a414192f6c5b13b17dd5b97c59e6f8f 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax.h
+++ b/src/southbridge/intel/i82801ax/i82801ax.h
@@ -21,7 +21,7 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801AX_I82801AX_H
 #define SOUTHBRIDGE_INTEL_I82801AX_I82801AX_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801ax_enable(device_t dev);
 #endif

diff --git a/src/southbridge/intel/i82801bx/i82801bx.h b/src/southbridge/intel/i82801bx/i82801bx.h
index 6d77f819850c6af6ff7a461817e171ff8e4ea938..8c2c30794c755064505b1ec55d6cf1b19d959602 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx.h
+++ b/src/southbridge/intel/i82801bx/i82801bx.h
@@ -21,7 +21,7 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801BX_I82801BX_H
 #define SOUTHBRIDGE_INTEL_I82801BX_I82801BX_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801bx_enable(device_t dev);
 #endif

diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index b9b3511a4ace5df41e27bececd6789ff69077486..4cb215efbb1ff3d611d26bf561c1b238e88206d6 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -1,7 +1,7 @@
 #ifndef I82801CX_H
 #define I82801CX_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801cx_enable(device_t dev);
 #endif

diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index a1c30c290ec3941b497a709fc2d37005e45607db..885f9de0f104cca9a04a7b05a034bcfca6c9d246 100644 (file)
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -31,7 +31,7 @@
 #ifndef I82801DX_H
 #define I82801DX_H
 
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801dx_enable(device_t dev);
 #endif

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 3ae440d56881f91782162951f0b9205a550d094e..b5a2054526df18ad48ddcdf0ca33a3a849cb038e 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -39,10 +39,7 @@
 #ifndef __ACPI__
 #define DEBUG_PERIODIC_SMIS 0
 
-/* __ROMCC__ is set by romstage.c to make sure
- * none of the stage2 data structures are included.
- */
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801gx_enable(device_t dev);
 #endif