*/
void post_code(uint8_t value)
{
-#if !defined(NO_POST)
+#if NO_POST==0
#if CONFIG_SERIAL_POST==1
printk_emerg("POST: 0x%02x\n", value);
#endif
#endif
};
int needs_reset;
- print_emerg("H\n");
+
enable_lapic();
init_timer();
if (cpu_init_detected()) {
print_info("ht reset -");
soft_reset();
}
- print_emerg("HER\n");
+
#if 0
print_pci_devices();
#endif
dump_pci_device(PCI_DEV(0, 0x18, 2));
#endif
- print_err("LET'S DO SOME MEMORY\n");
+
#if 1
/* Check the first 1M */
- ram_check(0x00000000, 0x000100000);
+ ram_check(0x00000000, 0x001000000);
#endif
}
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
- print_debug("Testing DRAM : ");
- print_debug_hex32(start);
- print_debug("-");
- print_debug_hex32(stop);
- print_debug("\r\n");
+ print_err("Testing DRAM : ");
+ print_err_hex32(start);
+ print_err("-");
+ print_err_hex32(stop);
+ print_err("\r\n");
ram_fill(start, stop);
ram_verify(start, stop);
- print_debug("Done.\r\n");
+ print_err("Done.\r\n");
}
uses CONFIG_IOAPIC
uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
+uses CONFIG_SERIAL_POST
+uses NO_POST
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
uses FALLBACK_SIZE
option CONFIG_CHIP_CONFIGURE=1
-option MAXIMUM_CONSOLE_LOGLEVEL=8
-option DEFAULT_CONSOLE_LOGLEVEL=8
+option MAXIMUM_CONSOLE_LOGLEVEL=9
+option DEFAULT_CONSOLE_LOGLEVEL=9
option CONFIG_CONSOLE_SERIAL8250=1
+option CONFIG_SERIAL_POST=1
+option NO_POST=0
option CPU_FIXUP=1
option CONFIG_UDELAY_TSC=0