+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-Name(\CBA1, 0x60)
-Name(\CBA2, 0x60)
-
-Device (BAT1)
-{
- Name(_HID, EisaId("PNP0C0A"))
- Name(_UID, 1)
-
- Name(_PCL, Package(){ _SB })
- Name(PSTA, 0x1f)
- Name(PBIF, Package() {
- 0x00,
- 0x78,
- 0x64,
- 0x01,
- 0x2b5c, // Capacity?
- 0x05,
- 0x03,
- 0x01,
- 0x01,
- "???", // Name
- "???", // Number
- "???", // Type
- "???" // Vendor
- })
- Name(PBST, Package() { 0x01, 0x16, 0x64, 0x2b5c })
-
- /* Status */
- Method(_STA, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- If(\_SB.PCI0.LPCB.EC0.P62S) {
- Return(0x0f)
- } Else {
- Return(0x1f)
- }
- } Else {
- Return(0x0f)
- }
- }
-
- /* Battery Info */
- Method(_BIF, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- If(\_SB.PCI0.LPCB.EC0.P62S) {
- IVBI()
- IVBS()
- } Else {
- UPBI()
- }
- }
-
- Return(PBIF)
- }
-
- /* Battery Status */
- Method(_BST, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- UPBS()
- }
-
- Return(PBST)
- }
-
- /* Update Battery Info */
- Method(UPBI, 0)
- {
- Store (0x78, Index(PBIF, 1))
- Store (0x64, Index(PBIF, 2))
- Store (0x2b5c, Index(PBIF, 4))
- Store ("Bat1", Index(PBIF, 9))
- Store ("001", Index(PBIF, 10))
- Store ("LION", Index(PBIF, 11))
- Store ("Panasonic", Index(PBIF, 12))
- }
-
- Method(UPBS, 0)
- {
- Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
- If (Not(Local0)) {
- Store(0, GP38)
- Sleep(0x64)
- Store(GP38, Local0)
- If (Not(Local0)) {
- Store (RDW(0x0d), Local0)
- If (LNotEqual(Local0, 0xeeee)) {
- If (LLessEqual(Local0, 0x64)) {
- Store(Local0, CBA1)
- }
- }
- }
- }
-
- Store (CBA1, Local0)
- Store (Local0, Index(PBST, 2))
- Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
- Store (0, Local1)
-
- If (PWRS) {
- If (LLess(Local0, 0x64)) {
- Store (2, Local1)
- }
- } Else {
- If (LLessEqual(Local0, 0x5)) {
- Store (4, Local1)
- } Else {
- Store (1, Local1)
- }
- }
-
- Store (Local1, Index(PBST, 0))
- If (\_SB.PCI0.LPCB.EC0.P63S) {
- Store (0x16, Index(PBST, 1))
- } Else {
- Store (0x0b, Index(PBST, 1))
- }
- }
-
- // Invalidate Battery Info
- Method(IVBI, 0)
- {
- Store (0xffffffff, Index(PBIF, 1))
- Store (0xffffffff, Index(PBIF, 2))
- Store (0xffffffff, Index(PBIF, 4))
- Store ("Bad", Index(PBIF, 9))
- Store ("Bad", Index(PBIF, 10))
- Store ("Bad", Index(PBIF, 11))
- Store ("Bad", Index(PBIF, 12))
- Store (1, PBIF)
- }
-
- Method(IVBS, 0)
- {
- Store (0x0, Index(PBST, 0))
- Store (0xffffffff, Index(PBST, 1))
- Store (0xffffffff, Index(PBST, 2))
- Store (0xffffffff, Index(PBST, 3))
- }
-}
-
-
-Device (BAT2)
-{
- Name(_HID, EisaId("PNP0C0A"))
- Name(_UID, 2)
-
- Name(_PCL, Package(){ _SB })
- Name(PSTA, 0x1f)
- Name(PBIF, Package() {
- 0x00,
- 0x78,
- 0x64,
- 0x01,
- 0x2b5c, // Capacity?
- 0x05,
- 0x03,
- 0x01,
- 0x01,
- "???", // Name
- "???", // Number
- "???", // Type
- "???" // Vendor
- })
- Name(PBST, Package() { 0x01, 0x16, 0x64, 0x2b5c })
-
- /* Status */
- Method(_STA, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- If(\_SB.PCI0.LPCB.EC0.P63S) {
- Return(0x0f)
- } Else {
- Return(0x1f)
- }
- } Else {
- Return(0x0f)
- }
- }
-
- /* Battery Info */
- Method(_BIF, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- If(\_SB.PCI0.LPCB.EC0.P63S) {
- IVBI()
- IVBS()
- } Else {
- UPBI()
- }
- }
-
- Return(PBIF)
- }
-
- /* Battery Status */
- Method(_BST, 0)
- {
- If(\_SB.PCI0.LPCB.EC0.ECON) {
- UPBS()
- }
-
- Return(PBST)
- }
-
- /* Update Battery Info */
- Method(UPBI, 0)
- {
- Store (0x78, Index(PBIF, 1))
- Store (0x64, Index(PBIF, 2))
- Store (0x2b5c, Index(PBIF, 4))
- Store ("Bat2", Index(PBIF, 9))
- Store ("002", Index(PBIF, 10))
- Store ("LION", Index(PBIF, 11))
- Store ("Panasonic", Index(PBIF, 12))
- }
-
- Method(UPBS, 0)
- {
- Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
- If (Not(Local0)) {
- Store(0, GP38)
- Sleep(0x64)
- Store(GP38, Local0)
- If (Not(Local0)) {
- Store (RDW(0x0d), Local0)
- If (LNotEqual(Local0, 0xeeee)) {
- If (LLessEqual(Local0, 0x64)) {
- Store(Local0, CBA2)
- }
- }
- }
- }
-
- Store (CBA2, Local0)
- Store (Local0, Index(PBST, 2))
- Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
- Store (0, Local1)
-
- If (PWRS) {
- If (LLess(Local0, 0x64)) {
- Store (2, Local1)
- }
- } Else {
- If (LLessEqual(Local0, 0x5)) {
- Store (4, Local1)
- } Else {
- Store (1, Local1)
- }
- }
-
- Store (Local1, Index(PBST, 0))
- If (\_SB.PCI0.LPCB.EC0.P62S) {
- Store (0x16, Index(PBST, 1))
- } Else {
- Store (0x0b, Index(PBST, 1))
- }
- }
-
- // Invalidate Battery Info
- Method(IVBI, 0)
- {
- Store (0xffffffff, Index(PBIF, 1))
- Store (0xffffffff, Index(PBIF, 2))
- Store (0xffffffff, Index(PBIF, 4))
- Store ("Bad", Index(PBIF, 9))
- Store ("Bad", Index(PBIF, 10))
- Store ("Bad", Index(PBIF, 11))
- Store ("Bad", Index(PBIF, 12))
- Store (1, PBIF)
- }
-
- Method(IVBS, 0)
- {
- Store (0x0, Index(PBST, 0))
- Store (0xffffffff, Index(PBST, 1))
- Store (0xffffffff, Index(PBST, 2))
- Store (0xffffffff, Index(PBST, 3))
- }
-}
-
-Method (RDW, 1)
-{
- Store (0x16, \_SB.PCI0.LPCB.EC0.SMAD)
- Store (Arg0, \_SB.PCI0.LPCB.EC0.SMCM)
- Store (0x09, \_SB.PCI0.LPCB.EC0.SMPR)
- While (LNotEqual(\_SB.PCI0.LPCB.EC0.SMPR, 0x00)) {
- Stall (1)
- }
-
- Return (\_SB.PCI0.LPCB.EC0.SMW0)
-}
-
-Device (ADP1)
-{
- Name (_HID, "ACPI0003")
- Method (_PSR, 0)
- {
- If (\_SB.PCI0.LPCB.EC0.ECON) {
- Store (\_SB.PCI0.LPCB.EC0.P60S, Local0)
- If (Local0) {
- Store (0, PWRS)
- } Else {
- Store (1, PWRS)
- }
- }
-
- Stall (0x02)
- Return (PWRS)
- }
-
- Method (_PCL, 0)
- {
- Return (_SB)
- }
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-Device(EC0)
-{
- Name (_HID, EISAID("PNP0C09"))
- Name (_UID, 1)
-
- Name (_GPE, 23) // GPI07 / GPE23 -> Runtime SCI
- Name (ECON, 0)
- Name (QEVT, 0)
-
- OperationRegion(ERAM, EmbeddedControl, 0x00, 0xff)
- Field (ERAM, ByteAcc, NoLock, Preserve)
- {
- Offset(0x04), // Command interface
- CMCM, 8,
- CMD1, 8,
- CMD2, 8,
- CMD3, 8,
- Offset(0x18), // SMBus
- SMPR, 8,
- SMST, 8,
- SMAD, 8,
- SMCM, 8,
- Offset(0x1c),
- SMW0, 16,
- //SMD0, 264,
- Offset(0x3d),
- SMAA, 8,
- Offset(0x78), // GPIs
- P60S, 1,
- P61S, 1,
- P62S, 1,
- P63S, 1,
- P64S, 1,
- P65S, 1,
- P66S, 1,
- P67S, 1,
- Offset(0x83), // Thermal
- RTMP, 8,
- TML0, 8,
- TMH0, 8,
- Offset(0x87),
- TMCR, 8,
- Offset(0x89),
- TML1, 8,
- TMH1, 8
- }
-
- Method (_CRS, 0)
- {
- Name (ECMD, ResourceTemplate()
- {
- IO (Decode16, 0x62, 0x62, 1, 1)
- IO (Decode16, 0x66, 0x66, 1, 1)
- })
-
- Return (ECMD)
- }
-
- Method (_REG, 2)
- {
- // This method is needed by Windows XP/2000 for
- // EC initialization before a driver is loaded
-
- If (LEqual(Arg0, 0x03)) {
- Store (Arg1, ECON)
- }
- }
-
- // EC Query methods
-
- Method (_Q11, 0)
- {
- Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)
- Notify(SLPB, 0x80)
- }
-
- Method (_Q12, 0)
- {
- Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
- // Store(1, TLST)
- // HKDS(10)
- }
-
- Method (_Q30, 0)
- {
- Store("_Q30: AC In/Out", Debug)
- Notify(ADP1, 0x80) // Tell the Power Adapter
- PNOT() // and the CPU and Battery
- }
-
- Method (_Q31, 0)
- {
- Store("_Q31: LID Open/Close", Debug)
- Notify(LID0, 0x80)
- }
-
- Method (_Q32, 0)
- {
- Store("_Q32: Battery 1 In/Out", Debug)
- If (ECON) {
- Store (P62S, Local0)
- If (Not(Local0)) {
- Notify(BAT1, 0x80)
- }
- }
- }
-
- Method (_Q33, 0)
- {
- Store("_Q33: Battery 2 In/Out", Debug)
- If (ECON) {
- Store (P63S, Local0)
- If (Not(Local0)) {
- Notify(BAT2, 0x80)
- }
- }
- }
-
- Method (_Q34, 0)
- {
- Store("_Q34: LPT/FDD", Debug)
- // PHSS(0x70)
- }
-
- Method (_Q35, 0)
- {
- Store("_Q35: Processor is hot", Debug)
- }
-
- Method (_Q36, 0)
- {
- Store("_Q36: Thermal Warning", Debug)
- }
-
- Method (_Q37, 0)
- {
- Store("_Q37: PME", Debug)
- }
-
- Method (_Q38, 0)
- {
- Store("_Q38: Thermal", Debug)
- }
-
- Method (_Q39, 0)
- {
- Store("_Q39: Thermal", Debug)
- }
-
- // TODO Scope _SB devices for AC power, LID, Power button
-
-}
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-Scope (_GPE)
-{
- /* The event numbers correspond to the bit numbers in the
- * GPE0_EN register PMBASE + 0x2C.
- */
-
- // Thermal Event
- Method (_L00, 0)
- {
-
- }
-
- // Hot Plug
- Method (_L01, 0)
- {
-
- }
-
- // Software GPE
- Method (_L02, 0)
- {
-
- }
-
- // USB1
- Method (_L03, 0)
- {
-
- }
-
- // USB2
- Method (_L04, 0)
- {
-
- }
-
- // AC97
- Method (_L05, 0)
- {
-
- }
-
- // _L06 TCOSCI
-
- // SMBus (Reserved!)
- Method (_L07, 0)
- {
-
- }
-
- // COM1/COM2 (RI)
- Method (_L08, 0)
- {
-
- }
-
- // PCIe
- Method (_L09, 0)
- {
-
- }
-
- // _L0A BatLow / Quick Resume
-
- // PME
- Method (_L0B, 0)
- {
-
- }
-
- // USB3
- Method (_L0C, 0)
- {
-
- }
-
- // PME B0
- Method (_L0D, 0)
- {
-
- }
-
- // USB4
- Method (_L0E, 0)
- {
-
- }
-
- // _L10 - _L1f: GPIn
-
- // GPI13
- Method (_L1D, 0)
- {
-
- }
-}
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* This is board specific information: IRQ routing for the
- * i945
- */
-
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // PCIe Graphics 0:1.0
- Package() { 0x0001ffff, 0, 0, 16 },
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 17 },
- Package() { 0x001cffff, 1, 0, 16 },
- Package() { 0x001cffff, 2, 0, 18 },
- Package() { 0x001cffff, 3, 0, 19 },
- // USB and EHCI 0:1d.x
- Package() { 0x001dffff, 0, 0, 23 },
- Package() { 0x001dffff, 1, 0, 19 },
- Package() { 0x001dffff, 2, 0, 18 },
- Package() { 0x001dffff, 3, 0, 16 },
- // AC97 0:1e.2, 0:1e.3
- Package() { 0x001effff, 0, 0, 22 },
- Package() { 0x001effff, 1, 0, 20 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, 0, 18 },
- Package() { 0x001fffff, 1, 0, 19 },
- Package() { 0x001fffff, 1, 0, 20 },
- Package() { 0x001fffff, 3, 0, 16 }
- })
- } Else {
- Return (Package() {
- // PCIe Graphics 0:1.0
- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // USB and EHCI 0:1d.x
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- // AC97 0:1e.2, 0:1e.3
- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }
- })
- }
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* This is board specific information: IRQ routing for the
- * 0:1e.0 PCI bridge of the ICH7
- */
-
-If (PICM) {
- Return (Package() {
- // PCI Slot 1 routes ????
- Package() { 0x0000ffff, 0, 0, 21},
- Package() { 0x0000ffff, 1, 0, 22},
- Package() { 0x0000ffff, 2, 0, 23},
- Package() { 0x0000ffff, 3, 0, 20},
-
- // PCI Slot 2 routes ????
- Package() { 0x0001ffff, 0, 0, 22},
- Package() { 0x0001ffff, 1, 0, 21},
- Package() { 0x0001ffff, 2, 0, 20},
- Package() { 0x0001ffff, 3, 0, 23},
-
- // PCI Slot 3 routes ????
- Package() { 0x0002ffff, 0, 0, 18},
- Package() { 0x0002ffff, 1, 0, 19},
- Package() { 0x0002ffff, 2, 0, 17},
- Package() { 0x0002ffff, 3, 0, 16},
-
- Package() { 0x0003ffff, 0, 0, 16},
- Package() { 0x0003ffff, 1, 0, 17},
- Package() { 0x0003ffff, 2, 0, 18},
- Package() { 0x0003ffff, 3, 0, 19},
-
- Package() { 0x0005ffff, 0, 0, 17},
- Package() { 0x0005ffff, 1, 0, 20},
- Package() { 0x0005ffff, 2, 0, 22},
- Package() { 0x0005ffff, 3, 0, 21},
-
- Package() { 0x0008ffff, 0, 0, 20},
- })
-} Else {
- Return (Package() {
- // PCI Slot 1 routes FGHE
- Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
- Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
- Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
- Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
-
- // PCI Slot 2 routes GFEH
- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKG, 0},
- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKE, 0},
- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
-
- // PCI Slot 3 routes CDBA
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
- Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
-
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
- Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
-
- Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKE, 0},
- Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
- Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKF, 0},
-
- Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
- })
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-Device (LID0)
-{
- Name(_HID, EisaId("PNP0C0D"))
- Method(_LID, 0)
- {
- Return (1)
- }
-}
-
-Device (SLPB)
-{
- Name(_HID, EisaId("PNP0C0E"))
-}
-
-Device (PWRB)
-{
- Name(_HID, EisaId("PNP0C0C"))
-
- // Wake
- Name(_PRW, Package(){0x1d, 0x04})
-}
-
-#include "acpi/battery.asl"
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* These come from the dynamically created CPU SSDT */
-External(PDC0)
-External(PDC1)
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
- APMC, 8, // APM command
- APMS, 8 // APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
- DBG0, 8
-}
-
-/* SMI I/O Trap */
-Method(TRAP, 1, Serialized)
-{
- Store (Arg0, SMIF) // SMI Function
- Store (0, TRP0) // Generate trap
- Return (SMIF) // Return value of SMI handler
-}
-
-/* The _PIC method is called by the OS to choose between interrupt
- * routing via the i8259 interrupt controller or the APIC.
- *
- * _PIC is called with a parameter of 0 for i8259 configuration and
- * with a parameter of 1 for Local Apic/IOAPIC configuration.
- */
-
-Method(_PIC, 1)
-{
- // Remember the OS' IRQ routing choice.
- Store(Arg0, PICM)
-}
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
- // Call a trap so SMI can prepare for Sleep as well.
- // TRAP(0x55)
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
- // CPU specific part
-
- // Notify PCI Express slots in case a card
- // was inserted while a sleep state was active.
-
- // Are we going to S3?
- If (LEqual(Arg0, 3)) {
- // ..
- }
-
- // Are we going to S4?
- If (LEqual(Arg0, 4)) {
- // ..
- }
-
- // TODO: Windows XP SP2 P-State restore
-
- Return(Package(){0,0})
-}
-
-// Power notification
-
-External (\_PR_.CPU0, DeviceObj)
-External (\_PR_.CPU1, DeviceObj)
-
-Method (PNOT)
-{
- If (MPEN) {
- If(And(PDC0, 0x08)) {
- Notify (\_PR_.CPU0, 0x80) // _PPC
-
- If (And(PDC0, 0x10)) {
- Sleep(100)
- Notify(\_PR_.CPU0, 0x81) // _CST
- }
- }
-
- If(And(PDC1, 0x08)) {
- Notify (\_PR_.CPU1, 0x80) // _PPC
- If (And(PDC1, 0x10)) {
- Sleep(100)
- Notify(\_PR_.CPU1, 0x81) // _CST
- }
- }
-
- } Else { // UP
- Notify (\_PR_.CPU0, 0x80)
- Sleep(0x64)
- Notify(\_PR_.CPU0, 0x81)
- }
-
- // Notify the Batteries
- Notify(BAT1, 0x80) // Execute BAT1 _BST
- Notify(BAT2, 0x80) // Execute BAT2 _BST
-}
-
-/* System Bus */
-
-Scope(\_SB)
-{
- /* This method is placed on the top level, so we can make sure it's the
- * first executed _INI method.
- */
- Method(_INI, 0)
- {
- /* The DTS data in NVS is probably not up to date.
- * Update temperature values and make sure AP thermal
- * interrupts can happen
- */
-
- // TRAP(71) // TODO
-
- /* Determine the Operating System and save the value in OSYS.
- * We have to do this in order to be able to work around
- * certain windows bugs.
- *
- * OSYS value | Operating System
- * -----------+------------------
- * 2000 | Windows 2000
- * 2001 | Windows XP(+SP1)
- * 2002 | Windows XP SP2
- * 2006 | Windows Vista
- * ???? | Windows 7
- */
-
- /* Let's assume we're running at least Windows 2000 */
- Store (2000, OSYS)
-
- If (CondRefOf(_OSI, Local0)) {
- /* Linux answers _OSI with "True" for a couple of
- * Windows version queries. But unlike Windows it
- * needs a Video repost, so let's determine whether
- * we're running Linux.
- */
-
- If (_OSI("Linux")) {
- Store (1, LINX)
- }
-
- If (_OSI("Windows 2001")) {
- Store (2001, OSYS)
- }
-
- If (_OSI("Windows 2001 SP1")) {
- Store (2001, OSYS)
- }
-
- If (_OSI("Windows 2001 SP2")) {
- Store (2002, OSYS)
- }
-
- If (_OSI("Windows 2006")) {
- Store (2006, OSYS)
- }
- }
-
- /* And the OS workarounds start right after we know what we're
- * running: Windows XP SP1 needs to have C-State coordination
- * enabled in SMM.
- */
- If (LAnd(LEqual(OSYS, 2001), MPEN)) {
- // TRAP(61) // TODO
- }
-
- /* SMM power state and C4-on-C3 settings need to be updated */
- // TRAP(43) // TODO
- }
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* SMSC LPC47N227 */
-
-Device (SIO1)
-{
- Name (_HID, EISAID("PNP0A05"))
- Name (_UID, 1)
-
- OperationRegion(SIOR, SystemIO, 0x2e, 0x02)
- Field (SIOR, ByteAcc, Nolock, Preserve)
- {
- INDX, 8,
- DATA, 8
- }
-
- Mutex (SIOM, 0x00)
-
- Method (READ, 3)
- {
- Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (DATA, Local1)
- Store (0xaa, INDX)
- }
- And (Local1, Arg2, Local1)
- Release(SIOM)
- Return(Local1)
- }
-
- Method (WRIT, 3)
- {
- Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (Arg2, DATA)
- Store (0xaa, INDX)
- }
- Release(SIOM)
- }
-
- Device (COMA)
- {
- Name(_HID, EISAID("PNP0501"))
- Name(_UID, 1)
- Name(_PRW, Package() { 0x08, 0x03 })
-
- /* Device Status */
- Method (_STA, 0)
- {
- // Device disabled by coreboot?
- If (LEqual(CMAP, 0)) {
- Return (0)
- }
-
- // Is the hardware enabled?
- Store (READ(0, 0x24, 0xff), Local0)
- If (LEqual(Local0, 0)) {
- Return (0xd)
- } Else {
- // Power Enabled?
- Store (READ(0, 0x02, 0x08), Local0)
- If (LEqual(Local0, 0)) {
- Return (0x0d)
- } Else {
- Return (0x0f)
- }
- }
- }
-
- /* Device Disable */
- Method (_DIS, 0)
- {
- WRIT(0, 0x24, 0x00)
-
- Store(READ(0, 0x28, 0x0f), Local0)
- WRIT(0, 0x28, Local0)
-
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x02, Local0)
- }
-
- /* Possible Resource Settings */
- Name(_PRS, ResourceTemplate() {
- StartDependentFn(0, 1) {
- IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8)
- IRQNoFlags() { 4 }
- } EndDependentFn()
- })
-
- /* Current Resource Settings */
- Method(_CRS, 0)
- {
- Name(NONE, ResourceTemplate() {
- IO(Decode16, 0x000, 0x000, 0x0, 0x1)
- IRQNoFlags() { }
- })
-
- Name(RSRC, ResourceTemplate() {
- IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8, _IOA)
- IRQNoFlags(_IRA) { 4 }
- })
-
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
- Return(NONE)
- }
-
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMA._CRS._IOA._MIN, IOLO)
- CreateByteField(RSRC, 0x03, IOHI) // Why?
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMA._CRS._IOA._MAX, IORL)
- CreateByteField(RSRC, 0x05, IORH) // Why?
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQL)
-
- Store (READ(0, 0x24, 0xff), Local0)
- And (Local0, 0xc0, Local1)
- ShiftRight(Local1, 0x06, Local1)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOLO)
- Store(Local1, IOHI)
- Store(IOLO, IORL)
- Store(IOHI, IORH)
-
- /* Interrupt */
- Store(READ(0, 0x28, 0xf0), Local0)
- ShiftRight(Local0, 4, Local0)
- ShiftLeft(1, Local0, IRQL)
- Return(RSRC)
- }
-
- /* Set Resource Settings */
- Method(_SRS, 1)
- {
- CreateByteField(Arg0, 0x02, IOLO)
- CreateByteField(Arg0, 0x03, IOHI)
- CreateByteField(Arg0, 0x09, IRQL)
-
- WRIT(0, 0x24, 0)
- FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
- ShiftLeft(Local0, 4, Local0)
-
- Store(READ(0, 0x28, 0x0f), Local1)
- Or(Local0, Local1, Local0)
- WRIT(0, 0x28, Local0)
-
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
-
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
- WRIT(0, 0x24, Local0)
-
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
- WRIT(0, 0x02, Local0)
-
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And (Local0, Local1, Local0)
- WRIT(0, 0x07, Local0)
- }
-
-
- /* D0 state - Line drivers are on */
- Method (_PS0, 0)
- {
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
- WRIT(0, 0x02, Local0)
-
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x07, Local0)
- }
-
- /* D3 State - Line drivers are off */
- Method(_PS3, 0)
- {
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x02, Local0)
- }
- }
-
- Device (COMB)
- {
- Name(_HID, EISAID("PNP0501"))
- Name(_UID, 2)
- Name(_PRW, Package() { 0x08, 0x03 })
-
- /* Device Status */
- Method (_STA, 0)
- {
- // Device disabled by coreboot?
- If (LEqual(CMBP, 0)) {
- Return (0)
- }
-
- /* IRDA? */
- Store(READ(0, 0x0c, 0x38), Local0)
- If (LNotEqual(Local0, Zero)) {
- Return (0)
- }
-
- // Is the hardware enabled?
- Store (READ(0, 0x25, 0xff), Local0)
- If (LEqual(Local0, 0)) {
- Return (0xd)
- } Else {
- // Power Enabled?
- Store (READ(0, 0x02, 0x80), Local0)
- If (LEqual(Local0, 0)) {
- Return (0x0d)
- } Else {
- Return (0x0f)
- }
- }
- }
-
- /* Device Disable */
- Method (_DIS, 0)
- {
- WRIT(0, 0x25, 0x00)
-
- Store(READ(0, 0x28, 0xf0), Local0)
- WRIT(0, 0x28, Local0)
-
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x02, Local0)
- }
-
- /* Possible Resource Settings */
- Name(_PRS, ResourceTemplate() {
- StartDependentFn(0, 1) {
- IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8)
- IRQNoFlags() { 3 }
- } EndDependentFn()
- })
-
- /* Current Resource Settings */
- Method(_CRS, 0)
- {
- Name(NONE, ResourceTemplate() {
- IO(Decode16, 0x000, 0x000, 0x0, 0x1)
- IRQNoFlags() { }
- })
-
- Name(RSRC, ResourceTemplate() {
- IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8, _IOB)
- IRQNoFlags(_IRB) { 3 }
- })
-
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
- Return(NONE)
- }
-
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMB._CRS._IOB._MIN, IOLO)
- CreateByteField(RSRC, 0x03, IOHI)
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMB._CRS._IOB._MAX, IORL)
- CreateByteField(RSRC, 0x05, IORH)
- CreateByteField(RSRC,
- \_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQL)
-
- Store (READ(0, 0x25, 0xff), Local0)
- And (Local0, 0xc0, Local1)
- ShiftRight(Local1, 0x06, Local1)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOLO)
- Store(Local1, IOHI)
- Store(IOLO, IORL)
- Store(IOHI, IORH)
-
- /* Interrupt */
- Store(READ(0, 0x28, 0x0f), Local0)
- ShiftRight(Local0, 4, Local0)
- ShiftLeft(1, Local0, IRQL)
- Return(RSRC)
- }
-
- /* Set Resource Settings */
- Method(_SRS, 1)
- {
- CreateByteField(Arg0, 0x02, IOLO)
- CreateByteField(Arg0, 0x03, IOHI)
- CreateByteField(Arg0, 0x09, IRQL)
-
- WRIT(0, 0x25, 0)
- FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
-
- Store(READ(0, 0x28, 0xf0), Local1)
- Or(Local0, Local1, Local0)
- WRIT(0, 0x28, Local0)
-
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
-
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
- WRIT(0, 0x25, Local0)
-
- Store(READ(0, 0x0c, 0xff), Local0)
- Not(0x38, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x0c, Local0)
-
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
- WRIT(0, 0x02, Local0)
-
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And (Local0, Local1, Local0)
- WRIT(0, 0x07, Local0)
- }
-
- /* D0 state - Line drivers are on */
- Method (_PS0, 0)
- {
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
- WRIT(0, 0x02, Local0)
-
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x07, Local0)
- }
-
- /* D3 State - Line drivers are off */
- Method(_PS3, 0)
- {
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
- WRIT(0, 0x02, Local0)
- }
- }
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-// Thermal Zone
-
-Scope (\_TZ)
-{
- ThermalZone (THRM)
- {
-
- // FIXME these could/should be read from the
- // GNVS area, so they can be controlled by
- // coreboot
- Name(TC1V, 0x04)
- Name(TC2V, 0x03)
- Name(TSPV, 0x64)
-
- // At which temperature should the OS start
- // active cooling?
- Method (_AC0, 0, Serialized)
- {
- Return (0xf5c) // Value for Rocky
- }
-
- // Method (_AC1, 0, Serialized)
- // {
- // Return (0xf5c)
- // }
-
- // Critical shutdown temperature
- Method (_CRT, 0, Serialized)
- {
- Return (Add (0x0aac, 0x50)) // FIXME
- }
-
- // CPU throttling start temperature
- Method (_PSV, 0, Serialized)
- {
- Return (0xaaf) // FIXME
- }
-
- // Get DTS Temperature
- Method (_TMP, 0, Serialized)
- {
- Return (0xaac) // FIXME
- }
-
- // Processors used for active cooling
- Method (_PSL, 0, Serialized)
- {
- If (MPEN) {
- Return (Package() {\_PR.CPU0, \_PR.CPU1})
- }
- Return (Package() {\_PR.CPU0})
- }
-
- // TC1 value for passive cooling
- Method (_TC1, 0, Serialized)
- {
- Return (TC1V)
- }
-
- // TC2 value for passive cooling
- Method (_TC2, 0, Serialized)
- {
- Return (TC2V)
- }
-
- // Sampling period for passive cooling
- Method (_TSP, 0, Serialized)
- {
- Return (TSPV)
- }
-
-
- }
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
-
+++ /dev/null
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- 0x03, // DSDT revision: ACPI v3.0
- "COREv4", // OEM id
- "COREBOOT", // OEM table id
- 0x20090419 // OEM revision
-)
-{
- // Some generic macros
- #include "acpi/platform.asl"
-
- // global NVS and variables
- #include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl"
-
- // General Purpose Events
- #include "acpi/gpe.asl"
-
- // mainboard specific devices
- #include "acpi/mainboard.asl"
-
- // Thermal Zone
- #include "acpi/thermal.asl"
-
- Scope (\_SB) {
- Device (PCI0)
- {
- #include "../../../northbridge/intel/i945/acpi/i945.asl"
- #include "../../../southbridge/intel/i82801gx/acpi/ich7.asl"
- }
- }
-
- /* Chipset specific sleep states */
- #include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl"
-}
projects / coreboot.git / commitdiff