Fix Fam14 AGESA ACPI table generation

The AGESA wrapper init late call generates the SSDT and other ACPI tables. The
call was failing without heap space allocated causing the ASSERT messages in
the output. I think are there may still be other issues in integrating the
SSDT table with the DSDT, but now it is there to debug.

The changes were made in Persimmon and copied to the other Fam14 mainboards.
Change-Id: I2cfd14e07cb46d2f46f5a8cd21c4c9aab44e4ffd
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/517
Tested-by: build bot (Jenkins)
Reviewed-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

diff --git a/src/mainboard/amd/inagua/acpi_tables.c b/src/mainboard/amd/inagua/acpi_tables.c
index 74df922b19b98a28ccb1787536a83840c2ef8885..2e6e50fd4f31c522eadcccf6b02d9110254d0370 100644 (file)
--- a/src/mainboard/amd/inagua/acpi_tables.c
+++ b/src/mainboard/amd/inagua/acpi_tables.c
@@ -130,6 +130,7 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_header_t *dsdt;
        acpi_header_t *ssdt;
        acpi_header_t *ssdt2;
+       acpi_header_t *alib;
 
        get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
 
@@ -223,6 +224,20 @@ unsigned long write_acpi_tables(unsigned long start)
        }
 
        /* SSDT */
+       current  = ( current + 0x0f) & -0x10;
+       printk(BIOS_DEBUG, "ACPI:  * AGESA ALIB SSDT at %lx\n", current);
+       alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB);
+       if (alib != NULL) {
+               memcpy((void *)current, alib, alib->length);
+               ssdt = (acpi_header_t *) current;
+               current += alib->length;
+               acpi_add_table(rsdp,alib);
+       }
+       else {
+               printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. Skipping.\n");
+       }
+
+#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -235,6 +250,7 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
        }
        acpi_add_table(rsdp,ssdt);
+#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);

diff --git a/src/mainboard/amd/inagua/agesawrapper.c b/src/mainboard/amd/inagua/agesawrapper.c
index 727436cd9dc6f88cf46c484bfd307aa9fbc14644..c33d20fde064920d17b3409dc67aeefe299c2f91 100644 (file)
--- a/src/mainboard/amd/inagua/agesawrapper.c
+++ b/src/mainboard/amd/inagua/agesawrapper.c
@@ -36,6 +36,7 @@
 #include "amdlib.h"
 #include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
+#include <arch/io.h>
 
 #define FILECODE UNASSIGNED_FILE_FILECODE
 
@@ -44,6 +45,8 @@
  *------------------------------------------------------------------------------
  */
 
+#define MMCONF_ENABLE 1
+
 /* ACPI table pointers returned by AmdInitLate */
 VOID *DmiTable         = NULL;
 VOID *AcpiPstate       = NULL;
@@ -79,44 +82,45 @@ agesawrapper_amdinitcpuio (
        VOID
        )
 {
-       AGESA_STATUS            Status;
-       UINT64                          MsrReg;
-       UINT32                          PciData;
-       PCI_ADDR                        PciAddress;
-       AMD_CONFIG_PARAMS       StdHeader;
-
-       /* Enable MMIO on AMD CPU Address Map Controller */
+       AGESA_STATUS                            Status;
+       UINT64                                          MsrReg;
+       UINT32                                          PciData;
+       PCI_ADDR                                        PciAddress;
+       AMD_CONFIG_PARAMS                       StdHeader;
+
+       /* Enable legacy video routing: D18F1xF4 VGA Enable */
+       PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xF4);
+       PciData = 1;
+       LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 
-       /* Start to set MMIO 0000A0000-0000BFFFF to Node0 Link0 */
+       /* The platform BIOS needs to ensure the memory ranges of SB800 legacy
+        * devices (TPM, HPET, BIOS RAM, Watchdog Timer, I/O APIC and ACPI) are
+        * set to non-posted regions.
+        */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84);
-       PciData = 0x00000B00;
+       PciData = 0x00FEDF00; // last address before processor local APIC at FEE00000
+       PciData |= 1 << 7;      // set NP (non-posted) bit
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80);
-       PciData = 0x00000A03;
+       PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 
-       /* Set TOM-DFFFFFFF to Node0 Link0. */
+       /* Map the remaining PCI hole as posted MMIO */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x8C);
-       PciData = 0x00DFFF00;
+       PciData = 0x00FECF00; // last address before non-posted range
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        LibAmdMsrRead (0xC001001A, &MsrReg, &StdHeader);
        MsrReg = (MsrReg >> 8) | 3;
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x88);
        PciData = (UINT32)MsrReg;
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-       /* Set E0000000-FFFFFFFF to Node0 Link0 with NP set. */
-       PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xBC);
-       PciData = 0x00FFFF00 | 0x80;
-       LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-       PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xB8);
-       PciData = (PCIE_BASE_ADDRESS >> 8) | 03;
-       LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-       /* Start to set PCIIO 0000-FFFF to Node0 Link0 with ISA&VGA set. */
+
+       /* Send all IO (0000-FFFF) to southbridge. */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC4);
        PciData = 0x0000F000;
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC0);
-       PciData = 0x00000013;
+       PciData = 0x00000003;
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        Status = AGESA_SUCCESS;
        return (UINT32)Status;
@@ -127,24 +131,37 @@ agesawrapper_amdinitmmio (
        VOID
        )
 {
-       AGESA_STATUS            Status;
-       UINT64                          MsrReg;
-       UINT32                          PciData;
-       PCI_ADDR                        PciAddress;
-       AMD_CONFIG_PARAMS       StdHeader;
+       AGESA_STATUS                            Status;
+       UINT64                                          MsrReg;
+       UINT32                                          PciData;
+       PCI_ADDR                                        PciAddress;
+       AMD_CONFIG_PARAMS                       StdHeader;
+
+       UINT8                                           BusRangeVal = 0;
+       UINT8                                           BusNum;
+       UINT8                                           Index;
 
        /*
         Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base
         Address MSR register.
        */
-       MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (8 << 2) | 1;
+
+       for (Index = 0; Index < 8; Index++) {
+               BusNum = CONFIG_MMCONF_BUS_NUMBER >> Index;
+               if (BusNum == 1) {
+                       BusRangeVal = Index;
+                       break;
+               }
+       }
+
+       MsrReg = (CONFIG_MMCONF_BASE_ADDRESS | (UINT64)(BusRangeVal << 2) | MMCONF_ENABLE);
        LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader);
 
        /*
         Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
        */
        LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader);
-       MsrReg = MsrReg | 0x0000400000000000;
+       MsrReg = MsrReg | 0x0000400000000000ull;
        LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
 
        /* Set Ontario Link Data */
@@ -155,13 +172,6 @@ agesawrapper_amdinitmmio (
        PciData = (AMD_APU_SSID<<0x10)|AMD_APU_SVID;
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 
-
-       /* Set ROM cache onto WP to decrease post time */
-       MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5;
-       LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
-       MsrReg = (0x1000000000 - CONFIG_ROM_SIZE) | 0x800;
-       LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
-
        Status = AGESA_SUCCESS;
        return (UINT32)Status;
 }
@@ -262,12 +272,12 @@ agesawrapper_amdinitpost (
        status = AmdInitPost ((AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr);
        if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
        AmdReleaseStruct (&AmdParamStruct);
+
        /* Initialize heap space */
        BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
        HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
-       {
+       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
                *HeadPtr = 0x00000000;
                HeadPtr++;
        }
@@ -354,7 +364,6 @@ agesawrapper_amdinitenv (
        PciValue |= 0x80000000;
        LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 
-
        /* Initialize MMIO Base and Limit Address
        *       Modify B0D1F0x20
        */
@@ -442,68 +451,76 @@ agesawrapper_amdinitlate (
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
+       AMD_INTERFACE_PARAMS AmdParamStruct;
+       AMD_LATE_PARAMS * AmdLateParamsPtr;
 
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
+       LibAmdMemFill (&AmdParamStruct,
+                      0,
+                      sizeof (AMD_INTERFACE_PARAMS),
+                      &(AmdParamStruct.StdHeader));
 
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
+       AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
+       AmdParamStruct.AllocationMethod = PostMemDram;
+       AmdParamStruct.StdHeader.AltImageBasePtr = 0;
+       AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       AmdParamStruct.StdHeader.Func = 0;
+       AmdParamStruct.StdHeader.ImageBasePtr = 0;
+
+       AmdCreateStruct (&AmdParamStruct);
+       AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
 
-       Status = AmdInitLate (&AmdLateParams);
+       printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
+
+       Status = AmdInitLate (AmdLateParamsPtr);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
+       DmiTable    = AmdLateParamsPtr->DmiTable;
+       AcpiPstate  = AmdLateParamsPtr->AcpiPState;
+       AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
+       AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
+       AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
+       AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
+       AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
+
+       /* Don't release the structure until coreboot has copied the ACPI tables.
+        * AmdReleaseStruct (&AmdLateParams);
+        */
 
        return (UINT32)Status;
 }
 
 UINT32
 agesawrapper_amdlaterunaptask (
+       UINT32 Func,
        UINT32 Data,
        VOID *ConfigPtr
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
-
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
-
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
-
-       Status = AmdLateRunApTask (&AmdLateParams);
+       AP_EXE_PARAMS ApExeParams;
+
+       LibAmdMemFill (&ApExeParams,
+                                0,
+                                sizeof (AP_EXE_PARAMS),
+                                &(ApExeParams.StdHeader));
+
+       ApExeParams.StdHeader.AltImageBasePtr = 0;
+       ApExeParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       ApExeParams.StdHeader.Func = 0;
+       ApExeParams.StdHeader.ImageBasePtr = 0;
+       ApExeParams.StdHeader.ImageBasePtr = 0;
+       ApExeParams.FunctionNumber = Func;
+       ApExeParams.RelatedDataBlock = ConfigPtr;
+
+       Status = AmdLateRunApTask (&ApExeParams);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
-
        return (UINT32)Status;
 }
 
@@ -526,9 +543,9 @@ agesawrapper_amdreadeventlog (
        AmdEventParams.StdHeader.ImageBasePtr = 0;
        Status = AmdReadEventLog (&AmdEventParams);
        while (AmdEventParams.EventClass != 0) {
-               printk(BIOS_DEBUG,"\nEventLog:  EventClass = %x, EventInfo = %x.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
-               printk(BIOS_DEBUG,"     Param1 = %x, Param2 = %x.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
-               printk(BIOS_DEBUG,"     Param3 = %x, Param4 = %x.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
+               printk(BIOS_DEBUG,"\nEventLog:  EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
+               printk(BIOS_DEBUG,"     Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
+               printk(BIOS_DEBUG,"     Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
                Status = AmdReadEventLog (&AmdEventParams);
        }
 

diff --git a/src/mainboard/amd/persimmon/acpi_tables.c b/src/mainboard/amd/persimmon/acpi_tables.c
index 47e35af86f3e5e0001ab66b4266128c3812318d0..9526feabab079264496b911683913e68d8cb8adf 100644 (file)
--- a/src/mainboard/amd/persimmon/acpi_tables.c
+++ b/src/mainboard/amd/persimmon/acpi_tables.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -130,6 +131,7 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_header_t *dsdt;
        acpi_header_t *ssdt;
        acpi_header_t *ssdt2;
+       acpi_header_t *alib;
 
        get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
 
@@ -223,6 +225,20 @@ unsigned long write_acpi_tables(unsigned long start)
        }
 
        /* SSDT */
+       current  = ( current + 0x0f) & -0x10;
+       printk(BIOS_DEBUG, "ACPI:  * AGESA ALIB SSDT at %lx\n", current);
+       alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB);
+       if (alib != NULL) {
+               memcpy((void *)current, alib, alib->length);
+               ssdt = (acpi_header_t *) current;
+               current += alib->length;
+               acpi_add_table(rsdp,alib);
+       }
+       else {
+               printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. Skipping.\n");
+       }
+
+#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -230,11 +246,13 @@ unsigned long write_acpi_tables(unsigned long start)
                memcpy((void *)current, ssdt, ssdt->length);
                ssdt = (acpi_header_t *) current;
                current += ssdt->length;
+               acpi_add_table(rsdp,ssdt);
        }
        else {
-               printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
+               printk(BIOS_DEBUG, "  AGESA SSDT Pstate table NULL. Skipping.\n");
        }
        acpi_add_table(rsdp,ssdt);
+#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);
@@ -259,6 +277,9 @@ unsigned long write_acpi_tables(unsigned long start)
        printk(BIOS_DEBUG, "slit\n");
        dump_mem(slit, ((void *)slit) + slit->header.length);
 
+       printk(BIOS_DEBUG, "alib\n");
+       dump_mem(ssdt, ((void *)alib) + alib->length);
+
        printk(BIOS_DEBUG, "ssdt\n");
        dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
 

diff --git a/src/mainboard/amd/persimmon/agesawrapper.c b/src/mainboard/amd/persimmon/agesawrapper.c
index 55e848867733bf0ce7c1c04168afb693f47e1210..f9847c23d819269d545e78675433c50f21e7b97d 100644 (file)
--- a/src/mainboard/amd/persimmon/agesawrapper.c
+++ b/src/mainboard/amd/persimmon/agesawrapper.c
@@ -275,8 +275,7 @@ agesawrapper_amdinitpost (
        BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
        HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
-       {
+       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
                *HeadPtr = 0x00000000;
                HeadPtr++;
        }
@@ -450,32 +449,49 @@ agesawrapper_amdinitlate (
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
+       AMD_INTERFACE_PARAMS AmdParamStruct;
+       AMD_LATE_PARAMS * AmdLateParamsPtr;
 
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
+       LibAmdMemFill (&AmdParamStruct,
+                      0,
+                      sizeof (AMD_INTERFACE_PARAMS),
+                      &(AmdParamStruct.StdHeader));
 
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
+       AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
+       AmdParamStruct.AllocationMethod = PostMemDram;
+       AmdParamStruct.StdHeader.AltImageBasePtr = 0;
+       AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       AmdParamStruct.StdHeader.Func = 0;
+       AmdParamStruct.StdHeader.ImageBasePtr = 0;
+
+       AmdCreateStruct (&AmdParamStruct);
+       AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
 
-       Status = AmdInitLate (&AmdLateParams);
+       printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
+
+       Status = AmdInitLate (AmdLateParamsPtr);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
-
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
+       DmiTable    = AmdLateParamsPtr->DmiTable;
+       AcpiPstate  = AmdLateParamsPtr->AcpiPState;
+       AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
+       AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
+       AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
+       AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
+       AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
+
+       printk(BIOS_DEBUG, "In %s, AGESA generated ACPI tables:\n"
+               "   DmiTable:%p\n   AcpiPstate: %p\n   AcpiSrat:%p\n   AcpiSlit:%p\n"
+               "   Mce:%p\n   Cmc:%p\n   Alib:%p\n",
+                __func__, DmiTable, AcpiPstate, AcpiSrat, AcpiSlit,
+                AcpiWheaMce, AcpiWheaCmc, AcpiAlib);
+
+       /* Don't release the structure until coreboot has copied the ACPI tables.
+        * AmdReleaseStruct (&AmdLateParams);
+        */
 
        return (UINT32)Status;
 }

diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 368eed2f10c4f41290314e60a1fdf9bfaac33aad..3e5b14e2c246a802af6f32a2e7fd7c4727897cc1 100644 (file)
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -95,9 +95,9 @@
        #define BLDCFG_REMOVE_ACPI_PSTATES_PSS                  FALSE
        #define BLDCFG_REMOVE_ACPI_PSTATES_XPSS                 FALSE
        #define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT             FALSE
-#define BLDOPT_REMOVE_SRAT                                             TRUE
-#define BLDOPT_REMOVE_SLIT                                             TRUE
-#define BLDOPT_REMOVE_WHEA                                             TRUE
+#define BLDOPT_REMOVE_SRAT                                             FALSE
+#define BLDOPT_REMOVE_SLIT                                             FALSE
+#define BLDOPT_REMOVE_WHEA                                             FALSE
 #define BLDOPT_REMOVE_DMI                                              TRUE
 #define BLDOPT_REMOVE_HT_ASSIST                                        TRUE
 #define BLDOPT_REMOVE_ATM_MODE                                 TRUE

diff --git a/src/mainboard/amd/south_station/acpi_tables.c b/src/mainboard/amd/south_station/acpi_tables.c
index 74df922b19b98a28ccb1787536a83840c2ef8885..2e6e50fd4f31c522eadcccf6b02d9110254d0370 100644 (file)
--- a/src/mainboard/amd/south_station/acpi_tables.c
+++ b/src/mainboard/amd/south_station/acpi_tables.c
@@ -130,6 +130,7 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_header_t *dsdt;
        acpi_header_t *ssdt;
        acpi_header_t *ssdt2;
+       acpi_header_t *alib;
 
        get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
 
@@ -223,6 +224,20 @@ unsigned long write_acpi_tables(unsigned long start)
        }
 
        /* SSDT */
+       current  = ( current + 0x0f) & -0x10;
+       printk(BIOS_DEBUG, "ACPI:  * AGESA ALIB SSDT at %lx\n", current);
+       alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB);
+       if (alib != NULL) {
+               memcpy((void *)current, alib, alib->length);
+               ssdt = (acpi_header_t *) current;
+               current += alib->length;
+               acpi_add_table(rsdp,alib);
+       }
+       else {
+               printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. Skipping.\n");
+       }
+
+#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -235,6 +250,7 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
        }
        acpi_add_table(rsdp,ssdt);
+#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);

diff --git a/src/mainboard/amd/south_station/agesawrapper.c b/src/mainboard/amd/south_station/agesawrapper.c
index 55e848867733bf0ce7c1c04168afb693f47e1210..0fbb3e42d27b3e92c97214803905b9bf0ce54198 100644 (file)
--- a/src/mainboard/amd/south_station/agesawrapper.c
+++ b/src/mainboard/amd/south_station/agesawrapper.c
@@ -98,7 +98,7 @@ agesawrapper_amdinitcpuio (
         */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84);
        PciData = 0x00FEDF00; // last address before processor local APIC at FEE00000
-       PciData |= 1 << 7;              // set NP (non-posted) bit
+       PciData |= 1 << 7;      // set NP (non-posted) bit
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80);
        PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000
@@ -275,8 +275,7 @@ agesawrapper_amdinitpost (
        BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
        HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
-       {
+       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
                *HeadPtr = 0x00000000;
                HeadPtr++;
        }
@@ -450,32 +449,44 @@ agesawrapper_amdinitlate (
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
+       AMD_INTERFACE_PARAMS AmdParamStruct;
+       AMD_LATE_PARAMS * AmdLateParamsPtr;
 
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
+       LibAmdMemFill (&AmdParamStruct,
+                      0,
+                      sizeof (AMD_INTERFACE_PARAMS),
+                      &(AmdParamStruct.StdHeader));
 
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
+       AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
+       AmdParamStruct.AllocationMethod = PostMemDram;
+       AmdParamStruct.StdHeader.AltImageBasePtr = 0;
+       AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       AmdParamStruct.StdHeader.Func = 0;
+       AmdParamStruct.StdHeader.ImageBasePtr = 0;
+
+       AmdCreateStruct (&AmdParamStruct);
+       AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
 
-       Status = AmdInitLate (&AmdLateParams);
+       printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
+
+       Status = AmdInitLate (AmdLateParamsPtr);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
+       DmiTable    = AmdLateParamsPtr->DmiTable;
+       AcpiPstate  = AmdLateParamsPtr->AcpiPState;
+       AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
+       AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
+
+       AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
+       AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
+       AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
 
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
+       /* Don't release the structure until coreboot has copied the ACPI tables.
+        * AmdReleaseStruct (&AmdLateParams);
+        */
 
        return (UINT32)Status;
 }

diff --git a/src/mainboard/amd/union_station/acpi_tables.c b/src/mainboard/amd/union_station/acpi_tables.c
index 74df922b19b98a28ccb1787536a83840c2ef8885..2e6e50fd4f31c522eadcccf6b02d9110254d0370 100644 (file)
--- a/src/mainboard/amd/union_station/acpi_tables.c
+++ b/src/mainboard/amd/union_station/acpi_tables.c
@@ -130,6 +130,7 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_header_t *dsdt;
        acpi_header_t *ssdt;
        acpi_header_t *ssdt2;
+       acpi_header_t *alib;
 
        get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
 
@@ -223,6 +224,20 @@ unsigned long write_acpi_tables(unsigned long start)
        }
 
        /* SSDT */
+       current  = ( current + 0x0f) & -0x10;
+       printk(BIOS_DEBUG, "ACPI:  * AGESA ALIB SSDT at %lx\n", current);
+       alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB);
+       if (alib != NULL) {
+               memcpy((void *)current, alib, alib->length);
+               ssdt = (acpi_header_t *) current;
+               current += alib->length;
+               acpi_add_table(rsdp,alib);
+       }
+       else {
+               printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. Skipping.\n");
+       }
+
+#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -235,6 +250,7 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
        }
        acpi_add_table(rsdp,ssdt);
+#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);

diff --git a/src/mainboard/amd/union_station/agesawrapper.c b/src/mainboard/amd/union_station/agesawrapper.c
index 55e848867733bf0ce7c1c04168afb693f47e1210..0fbb3e42d27b3e92c97214803905b9bf0ce54198 100644 (file)
--- a/src/mainboard/amd/union_station/agesawrapper.c
+++ b/src/mainboard/amd/union_station/agesawrapper.c
@@ -98,7 +98,7 @@ agesawrapper_amdinitcpuio (
         */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84);
        PciData = 0x00FEDF00; // last address before processor local APIC at FEE00000
-       PciData |= 1 << 7;              // set NP (non-posted) bit
+       PciData |= 1 << 7;      // set NP (non-posted) bit
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80);
        PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000
@@ -275,8 +275,7 @@ agesawrapper_amdinitpost (
        BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
        HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
-       {
+       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
                *HeadPtr = 0x00000000;
                HeadPtr++;
        }
@@ -450,32 +449,44 @@ agesawrapper_amdinitlate (
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
+       AMD_INTERFACE_PARAMS AmdParamStruct;
+       AMD_LATE_PARAMS * AmdLateParamsPtr;
 
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
+       LibAmdMemFill (&AmdParamStruct,
+                      0,
+                      sizeof (AMD_INTERFACE_PARAMS),
+                      &(AmdParamStruct.StdHeader));
 
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
+       AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
+       AmdParamStruct.AllocationMethod = PostMemDram;
+       AmdParamStruct.StdHeader.AltImageBasePtr = 0;
+       AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       AmdParamStruct.StdHeader.Func = 0;
+       AmdParamStruct.StdHeader.ImageBasePtr = 0;
+
+       AmdCreateStruct (&AmdParamStruct);
+       AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
 
-       Status = AmdInitLate (&AmdLateParams);
+       printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
+
+       Status = AmdInitLate (AmdLateParamsPtr);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
+       DmiTable    = AmdLateParamsPtr->DmiTable;
+       AcpiPstate  = AmdLateParamsPtr->AcpiPState;
+       AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
+       AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
+
+       AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
+       AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
+       AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
 
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
+       /* Don't release the structure until coreboot has copied the ACPI tables.
+        * AmdReleaseStruct (&AmdLateParams);
+        */
 
        return (UINT32)Status;
 }

diff --git a/src/mainboard/asrock/e350m1/acpi_tables.c b/src/mainboard/asrock/e350m1/acpi_tables.c
index 74df922b19b98a28ccb1787536a83840c2ef8885..2e6e50fd4f31c522eadcccf6b02d9110254d0370 100644 (file)
--- a/src/mainboard/asrock/e350m1/acpi_tables.c
+++ b/src/mainboard/asrock/e350m1/acpi_tables.c
@@ -130,6 +130,7 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_header_t *dsdt;
        acpi_header_t *ssdt;
        acpi_header_t *ssdt2;
+       acpi_header_t *alib;
 
        get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
 
@@ -223,6 +224,20 @@ unsigned long write_acpi_tables(unsigned long start)
        }
 
        /* SSDT */
+       current  = ( current + 0x0f) & -0x10;
+       printk(BIOS_DEBUG, "ACPI:  * AGESA ALIB SSDT at %lx\n", current);
+       alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB);
+       if (alib != NULL) {
+               memcpy((void *)current, alib, alib->length);
+               ssdt = (acpi_header_t *) current;
+               current += alib->length;
+               acpi_add_table(rsdp,alib);
+       }
+       else {
+               printk(BIOS_DEBUG, "    AGESA ALIB SSDT table NULL. Skipping.\n");
+       }
+
+#if 0 // The DSDT needs additional work for the AGESA SSDT Pstate table
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * AGESA SSDT Pstate at %lx\n", current);
        ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE);
@@ -235,6 +250,7 @@ unsigned long write_acpi_tables(unsigned long start)
                printk(BIOS_DEBUG, "  AGESA SSDT table NULL. Skipping.\n");
        }
        acpi_add_table(rsdp,ssdt);
+#endif
 
        current  = ( current + 0x0f) & -0x10;
        printk(BIOS_DEBUG, "ACPI:  * coreboot TOM SSDT2 at %lx\n", current);

diff --git a/src/mainboard/asrock/e350m1/agesawrapper.c b/src/mainboard/asrock/e350m1/agesawrapper.c
index 8ecc8854a0ded5ff0199ebad9b2f4a92927d92e4..fc8702929fef01e94baf58f538492312817e80f6 100644 (file)
--- a/src/mainboard/asrock/e350m1/agesawrapper.c
+++ b/src/mainboard/asrock/e350m1/agesawrapper.c
@@ -36,6 +36,7 @@
 #include "amdlib.h"
 #include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
+#include <arch/io.h>
 
 #define FILECODE UNASSIGNED_FILE_FILECODE
 
@@ -44,6 +45,7 @@
  *------------------------------------------------------------------------------
  */
 
+#define MMCONF_ENABLE 1
 
 /* ACPI table pointers returned by AmdInitLate */
 VOID *DmiTable         = NULL;
@@ -96,7 +98,7 @@ agesawrapper_amdinitcpuio (
         */
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84);
        PciData = 0x00FEDF00; // last address before processor local APIC at FEE00000
-       PciData |= 1 << 7;              // set NP (non-posted) bit
+       PciData |= 1 << 7;      // set NP (non-posted) bit
        LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
        PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80);
        PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000
@@ -128,25 +130,37 @@ agesawrapper_amdinitmmio (
        VOID
        )
 {
-       AGESA_STATUS            Status;
-       UINT64                          MsrReg;
-       UINT32                          PciData;
-       PCI_ADDR                        PciAddress;
-       AMD_CONFIG_PARAMS       StdHeader;
+       AGESA_STATUS                            Status;
+       UINT64                                          MsrReg;
+       UINT32                                          PciData;
+       PCI_ADDR                                        PciAddress;
+       AMD_CONFIG_PARAMS                       StdHeader;
+
+       UINT8                                           BusRangeVal = 0;
+       UINT8                                           BusNum;
+       UINT8                                           Index;
 
        /*
-       Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base
-       Address MSR register.
+        Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base
+        Address MSR register.
        */
 
-       MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1;
+       for (Index = 0; Index < 8; Index++) {
+               BusNum = CONFIG_MMCONF_BUS_NUMBER >> Index;
+               if (BusNum == 1) {
+                       BusRangeVal = Index;
+                       break;
+               }
+       }
+
+       MsrReg = (CONFIG_MMCONF_BASE_ADDRESS | (UINT64)(BusRangeVal << 2) | MMCONF_ENABLE);
        LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader);
 
        /*
-       Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
+        Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
        */
        LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader);
-       MsrReg = MsrReg | 0x0000400000000000;
+       MsrReg = MsrReg | 0x0000400000000000ull;
        LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
 
        /* Set Ontario Link Data */
@@ -261,10 +275,9 @@ agesawrapper_amdinitpost (
        BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
        HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
-       {
-       *HeadPtr = 0x00000000;
-       HeadPtr++;
+       for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
+               *HeadPtr = 0x00000000;
+               HeadPtr++;
        }
        BiosManagerPtr->StartOfAllocatedNodes = 0;
        BiosManagerPtr->StartOfFreedNodes = 0;
@@ -436,32 +449,44 @@ agesawrapper_amdinitlate (
        )
 {
        AGESA_STATUS Status;
-       AMD_LATE_PARAMS AmdLateParams;
+       AMD_INTERFACE_PARAMS AmdParamStruct;
+       AMD_LATE_PARAMS * AmdLateParamsPtr;
 
-       LibAmdMemFill (&AmdLateParams,
-                                       0,
-                                       sizeof (AMD_LATE_PARAMS),
-                                       &(AmdLateParams.StdHeader));
+       LibAmdMemFill (&AmdParamStruct,
+                      0,
+                      sizeof (AMD_INTERFACE_PARAMS),
+                      &(AmdParamStruct.StdHeader));
 
-       AmdLateParams.StdHeader.AltImageBasePtr = 0;
-       AmdLateParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
-       AmdLateParams.StdHeader.Func = 0;
-       AmdLateParams.StdHeader.ImageBasePtr = 0;
+       AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
+       AmdParamStruct.AllocationMethod = PostMemDram;
+       AmdParamStruct.StdHeader.AltImageBasePtr = 0;
+       AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
+       AmdParamStruct.StdHeader.Func = 0;
+       AmdParamStruct.StdHeader.ImageBasePtr = 0;
 
-       Status = AmdInitLate (&AmdLateParams);
+       AmdCreateStruct (&AmdParamStruct);
+       AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
+
+       printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
+
+       Status = AmdInitLate (AmdLateParamsPtr);
        if (Status != AGESA_SUCCESS) {
                agesawrapper_amdreadeventlog();
                ASSERT(Status == AGESA_SUCCESS);
        }
 
-       DmiTable                = AmdLateParams.DmiTable;
-       AcpiPstate              = AmdLateParams.AcpiPState;
-       AcpiSrat                = AmdLateParams.AcpiSrat;
-       AcpiSlit                = AmdLateParams.AcpiSlit;
+       DmiTable    = AmdLateParamsPtr->DmiTable;
+       AcpiPstate  = AmdLateParamsPtr->AcpiPState;
+       AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
+       AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
 
-       AcpiWheaMce             = AmdLateParams.AcpiWheaMce;
-       AcpiWheaCmc             = AmdLateParams.AcpiWheaCmc;
-       AcpiAlib                = AmdLateParams.AcpiAlib;
+       AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
+       AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
+       AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
+
+       /* Don't release the structure until coreboot has copied the ACPI tables.
+        * AmdReleaseStruct (&AmdLateParams);
+        */
 
        return (UINT32)Status;
 }
@@ -517,10 +542,10 @@ agesawrapper_amdreadeventlog (
        AmdEventParams.StdHeader.ImageBasePtr = 0;
        Status = AmdReadEventLog (&AmdEventParams);
        while (AmdEventParams.EventClass != 0) {
-       printk(BIOS_DEBUG,"\nEventLog:  EventClass = %x, EventInfo = %x.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
-       printk(BIOS_DEBUG,"  Param1 = %x, Param2 = %x.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
-       printk(BIOS_DEBUG,"  Param3 = %x, Param4 = %x.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
-       Status = AmdReadEventLog (&AmdEventParams);
+               printk(BIOS_DEBUG,"\nEventLog:  EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
+               printk(BIOS_DEBUG,"     Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
+               printk(BIOS_DEBUG,"     Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
+               Status = AmdReadEventLog (&AmdEventParams);
        }
 
        return (UINT32)Status;