mainboard: complete the sb800 devicetree even device is off

sb800 cimx entry sb_Before_Pci_Init was called in the device 16.2
enable_dev() function. If the devicetree don't have this device,
then sb_Before_Pci_Init will not get called.

Change-Id: I76ebad842e90b0f740abbec031165d7c39a80abf
Signed-off-by: Kerry Sheh <kerry.she@amd.com>
Signed-off-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/230
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>

diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb
index 82658cffbc4cc5c45373f072e6479966101fd8b8..32d9a2672ce5a174f7fb29fc83c488bc6f4bb89a 100644 (file)
--- a/src/mainboard/amd/inagua/devicetree.cb
+++ b/src/mainboard/amd/inagua/devicetree.cb
@@ -71,6 +71,8 @@ chip northbridge/amd/agesa/family14/root_complex
                                        device pci 15.1 on end # PCIe PortB
                                        device pci 15.2 on end # PCIe PortC
                                        device pci 15.3 on end # PCIe PortD
+                                       device pci 16.0 off end # OHCI USB3
+                                       device pci 16.2 off end # EHCI USB3
                                        register "gpp_configuration" = "4" #1:1:1:1
                                        register "boot_switch_sata_ide" = "0"   # 0: boot from SATA. 1: IDE
                                end     #southbridge/amd/cimx/sb800

diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb
index bff8151fff9749a5ba6255b537c36efe51bd54b6..ca5cf2bce727a6eff1c92dec0dab18f1ce9a2821 100644 (file)
--- a/src/mainboard/asrock/e350m1/devicetree.cb
+++ b/src/mainboard/asrock/e350m1/devicetree.cb
@@ -103,6 +103,8 @@ chip northbridge/amd/agesa/family14/root_complex
                                        device pci 15.1 on  end # PCIe PortB: NIC
                                        device pci 15.2 on  end # PCIe PortC: USB3
                                        device pci 15.3 off end # PCIe PortD
+                                       device pci 16.0 off end # OHCI USB3
+                                       device pci 16.2 off end # EHCI USB3
 
                                        # gpp_configuration options
                                        #0000: PortA lanes[3:0]

diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index b581212aed99cc92021fa1ccef4b4c0ba9bcfc67..c36ee03237626ce7413a65bdcf0c8a530ad4910f 100644 (file)
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -419,7 +419,9 @@ static void sb800_enable(device_t dev)
        case (0x16 << 3) | 2: /* 0:16:2 EHCI-USB3 */
                sb_config->USBMODE.UsbMode.Ehci3 = dev->enabled;
 
-               /* the last sb800 device */
+               /* call the CIMX entry at the last sb800 device,
+                * so make sure the mainboard devicetree is complete
+                */
                sb_Before_Pci_Init();
                break;