fix most usbdebug warnings and fix function names.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c
index 56ec1e34598ba55c33ced2838151fd80568f62ba..d5372d9e2cf0df935574199d146f821ac268df64 100644 (file)
--- a/src/lib/usbdebug.c
+++ b/src/lib/usbdebug.c
@@ -83,7 +83,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
        unsigned ctrl;
        int loop = 0x100000;
        do {
-               ctrl = read32(&ehci_debug->control);
+               ctrl = read32((unsigned long)&ehci_debug->control);
                /* Stop when the transaction is finished */
                if (ctrl & DBGP_DONE)
                        break;
@@ -94,7 +94,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
        /* Now that we have observed the completed transaction,
         * clear the done bit.
         */
-       write32(&ehci_debug->control, ctrl | DBGP_DONE);
+       write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE);
        return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
 }
 
@@ -119,9 +119,9 @@ static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl)
 
        int loop = 3;
 retry:
-       write32(&ehci_debug->control, ctrl | DBGP_GO);
+       write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO);
        ret = dbgp_wait_until_complete(ehci_debug);
-       pids = read32(&ehci_debug->pids);
+       pids = read32((unsigned long)&ehci_debug->pids);
        lpid = DBGP_PID_GET(pids);
 
        if (ret < 0)
@@ -151,8 +151,8 @@ static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int
                lo |= bytes[i] << (8*i);
        for (; i < 8 && i < size; i++)
                hi |= bytes[i] << (8*(i - 4));
-       write32(&ehci_debug->data03, lo);
-       write32(&ehci_debug->data47, hi);
+       write32((unsigned long)&ehci_debug->data03, lo);
+       write32((unsigned long)&ehci_debug->data47, hi);
 }
 
 static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size)
@@ -160,8 +160,8 @@ static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size)
        unsigned char *bytes = buf;
        unsigned lo, hi;
        int i;
-       lo = read32(&ehci_debug->data03);
-       hi = read32(&ehci_debug->data47);
+       lo = read32((unsigned long)&ehci_debug->data03);
+       hi = read32((unsigned long)&ehci_debug->data47);
        for (i = 0; i < 4 && i < size; i++)
                bytes[i] = (lo >> (8*i)) & 0xff;
        for (; i < 8 && i < size; i++)
@@ -177,17 +177,17 @@ static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, un
 
        addr = DBGP_EPADDR(devnum, endpoint);
 
-       pids = read32(&ehci_debug->pids);
+       pids = read32((unsigned long)&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);
 
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl |= DBGP_OUT;
        ctrl |= DBGP_GO;
 
        dbgp_set_data(ehci_debug, bytes, size);
-       write32(&ehci_debug->address, addr);
-       write32(&ehci_debug->pids, pids);
+       write32((unsigned long)&ehci_debug->address, addr);
+       write32((unsigned long)&ehci_debug->pids, pids);
 
        ret = dbgp_wait_until_done(ehci_debug, ctrl);
        if (ret < 0) {
@@ -211,16 +211,16 @@ static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, uns
 
        addr = DBGP_EPADDR(devnum, endpoint);
 
-       pids = read32(&ehci_debug->pids);
+       pids = read32((unsigned long)&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_IN);
 
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl &= ~DBGP_OUT;
        ctrl |= DBGP_GO;
 
-       write32(&ehci_debug->address, addr);
-       write32(&ehci_debug->pids, pids);
+       write32((unsigned long)&ehci_debug->address, addr);
+       write32((unsigned long)&ehci_debug->pids, pids);
        ret = dbgp_wait_until_done(ehci_debug, ctrl);
        if (ret < 0)
                return ret;
@@ -256,15 +256,15 @@ static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, i
        pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
        addr = DBGP_EPADDR(devnum, 0);
 
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req));
        ctrl |= DBGP_OUT;
        ctrl |= DBGP_GO;
 
        /* Send the setup message */
        dbgp_set_data(ehci_debug, &req, sizeof(req));
-       write32(&ehci_debug->address, addr);
-       write32(&ehci_debug->pids, pids);
+       write32((unsigned long)&ehci_debug->address, addr);
+       write32((unsigned long)&ehci_debug->pids, pids);
        ret = dbgp_wait_until_done(ehci_debug, ctrl);
        if (ret < 0)
                return ret;
@@ -282,25 +282,25 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
        int loop;
 
        /* Reset the usb debug port */
-       portsc = read32(&ehci_regs->port_status[port - 1]);
+       portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
        portsc &= ~PORT_PE;
        portsc |= PORT_RESET;
-       write32(&ehci_regs->port_status[port - 1], portsc);
+       write32((unsigned long)&ehci_regs->port_status[port - 1], portsc);
 
        delay = HUB_ROOT_RESET_TIME;
        for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
             delay_time += delay) {
                dbgp_mdelay(delay);
 
-               portsc = read32(&ehci_regs->port_status[port - 1]);
+               portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
                if (portsc & PORT_RESET) {
                        /* force reset to complete */
                        loop = 2;
-                       write32(&ehci_regs->port_status[port - 1],
+                       write32((unsigned long)&ehci_regs->port_status[port - 1],
                                        portsc & ~(PORT_RWC_BITS | PORT_RESET));
                        do {
                                dbgp_mdelay(delay);
-                               portsc = read32(&ehci_regs->port_status[port - 1]);
+                               portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
                                delay_time += delay;
                        } while ((portsc & PORT_RESET) && (--loop > 0));
                        if (!loop) {
@@ -329,7 +329,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
        int ret, reps;
        for (reps = 0; reps < 3; reps++) {
                dbgp_mdelay(100);
-               status = read32(&ehci_regs->status);
+               status = read32((unsigned long)&ehci_regs->status);
                if (status & STS_PCD) {
                        ret = ehci_reset_port(ehci_regs, port);
                        if (ret == 0)
@@ -346,7 +346,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
 #else
 #define dbgp_printk(fmt_arg...)   do {} while(0)
 #endif
-static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
+static void usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
 {
        struct ehci_caps *ehci_caps;
        struct ehci_regs *ehci_regs;
@@ -356,7 +356,6 @@ static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci
        struct usb_debug_descriptor dbgp_desc;
        unsigned ctrl, devnum;
        int ret;
-       unsigned delay_time, delay;
        int loop;
 
        unsigned cmd,  status, portsc, hcs_params, debug_port, n_ports, new_debug_port;
@@ -366,16 +365,18 @@ static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci
        unsigned playtimes = 3;
 
        ehci_caps  = (struct ehci_caps *)ehci_bar;
-       ehci_regs  = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32(&ehci_caps->hc_capbase)));
+       ehci_regs  = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase)));
        ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset);
 
        info->ehci_debug = (void *)0;
 
+       new_debug_port = 0;
+
 try_next_time:
        port_map_tried = 0;
 
 try_next_port:
-       hcs_params = read32(&ehci_caps->hcs_params);
+       hcs_params = read32((unsigned long)&ehci_caps->hcs_params);
        debug_port = HCS_DEBUG_PORT(hcs_params);
        n_ports    = HCS_N_PORTS(hcs_params);
 
@@ -385,7 +386,7 @@ try_next_port:
 
 #if 1
         for (i = 1; i <= n_ports; i++) {
-                portsc = read32(&ehci_regs->port_status[i-1]);
+                portsc = read32((unsigned long)&ehci_regs->port_status[i-1]);
                 dbgp_printk("PORTSC #%d: %08x\n", i, portsc);
         }
 #endif
@@ -400,11 +401,11 @@ try_next_port:
 
        /* Reset the EHCI controller */
        loop = 10;
-       cmd = read32(&ehci_regs->command);
+       cmd = read32((unsigned long)&ehci_regs->command);
        cmd |= CMD_RESET;
-       write32(&ehci_regs->command, cmd);
+       write32((unsigned long)&ehci_regs->command, cmd);
        do {
-               cmd = read32(&ehci_regs->command);
+               cmd = read32((unsigned long)&ehci_regs->command);
        } while ((cmd & CMD_RESET) && (--loop > 0));
 
        if(!loop)
@@ -413,24 +414,24 @@ try_next_port:
                dbgp_printk("EHCI controller reset successfully.\n");
 
        /* Claim ownership, but do not enable yet */
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl |= DBGP_OWNER;
        ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
-       write32(&ehci_debug->control, ctrl);
+       write32((unsigned long)&ehci_debug->control, ctrl);
 
        /* Start the ehci running */
-       cmd = read32(&ehci_regs->command);
+       cmd = read32((unsigned long)&ehci_regs->command);
        cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
        cmd |= CMD_RUN;
-       write32(&ehci_regs->command, cmd);
+       write32((unsigned long)&ehci_regs->command, cmd);
 
        /* Ensure everything is routed to the EHCI */
-       write32(&ehci_regs->configured_flag, FLAG_CF);
+       write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF);
 
        /* Wait until the controller is no longer halted */
        loop = 10;
        do {
-               status = read32(&ehci_regs->status);
+               status = read32((unsigned long)&ehci_regs->status);
        } while ((status & STS_HALT) && (--loop>0));
 
        if(!loop) {
@@ -448,21 +449,21 @@ try_next_port:
        dbgp_printk("EHCI done waiting for port.\n");
 
        /* Enable the debug port */
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl |= DBGP_CLAIM;
-       write32(&ehci_debug->control, ctrl);
-       ctrl = read32(&ehci_debug->control);
+       write32((unsigned long)&ehci_debug->control, ctrl);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
                dbgp_printk("No device in EHCI debug port.\n");
-               write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM);
+               write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM);
                goto err;
        }
        dbgp_printk("EHCI debug port enabled.\n");
 
        /* Completely transfer the debug device to the debug controller */
-       portsc = read32(&ehci_regs->port_status[debug_port - 1]);
+       portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]);
        portsc &= ~PORT_PE;
-       write32(&ehci_regs->port_status[debug_port - 1], portsc);
+       write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc);
 
        dbgp_mdelay(100);
 
@@ -529,9 +530,9 @@ try_next_port:
        return;
 err:
        /* Things didn't work so remove my claim */
-       ctrl = read32(&ehci_debug->control);
+       ctrl = read32((unsigned long)&ehci_debug->control);
        ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
-       write32((unsigned long)&ehci_debug->control, ctrl);
+       write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl);
 
 next_debug_port:
        port_map_tried |= (1<<(debug_port-1));

diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 0da4b8f2934830469702d6179a33d8696f26d3d7..7082bd94a679ffb8fa643b36dc4bc13e76be0a28 100644 (file)
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -321,8 +321,8 @@ void main(unsigned long bist)
        uart_init();
 
 #if CONFIG_USBDEBUG_DIRECT
-       i82801gx_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       i82801gx_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
        console_init();
 

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 3ba256a606227d90003daa3ecdef1ff534a55f10..2eda2089c38fb03d304a741eab84c8c181c09058 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -200,8 +200,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       sis966_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       sis966_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
         console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 683f92b5f603107d3bcb19017795690efd651fcf..d7a7a3bb4c75599a45bf736904a07fd040157ca8 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -213,8 +213,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
         console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 961069a59acf595e969d679586f6f1f304b62546..87f658615b71a8f6021c8103b6f9ce5f1624ed87 100644 (file)
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -237,8 +237,8 @@ void main(unsigned long bist)
        uart_init();
 
 #if CONFIG_USBDEBUG_DIRECT
-       i82801gx_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       i82801gx_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
 
        console_init();

diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 94a5065fa11ab6e8b0d5aca76939a99c94f968a7..4ba6a1afeb64e285fd367464eeb95fff8dd6622b 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -381,8 +381,8 @@ void main(unsigned long bist)
        uart_init();
 
 #if CONFIG_USBDEBUG_DIRECT
-       i82801gx_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       i82801gx_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
 
        console_init();

diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 55adf23dbaafcddf23d1a13572afa6bea7484c4d..1b827a0dc9533c8945808c38c709c81304f54261 100644 (file)
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -182,8 +182,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        uart_init();
        report_bist_failure(bist); /* Halt upon BIST failure. */
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
        console_init();
 

diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index e0566b611434cf072d56f13380690ca04bea69ed..1c2a729d4a3deeb77e6f4de128e7bdc9434caeae 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -186,8 +186,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
 
        val = cpuid_eax(1);

diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index d5b717f8b357dd232bee5c3ecf7634a0ca500adc..572015bf8cbbb3b5614446397555ffb52807fe79 100644 (file)
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -199,8 +199,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
        console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index a910d1aadd85fa7ed19b8a7fdff6e8ee01a0f076..693251922c468f4cae0e713c9070bfa6a31feeca 100644 (file)
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -291,8 +291,8 @@ void main(unsigned long bist)
        uart_init();
 
 #if CONFIG_USBDEBUG_DIRECT
-       i82801gx_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       i82801gx_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
 
        console_init();

diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 4f536e77d7a67b2b769e8cb35fc94e25849f2386..cb2a2e0d4e6b15d176d0b0f3abd2c9387d186a2f 100644 (file)
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -193,8 +193,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
        console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 529047092958f70a15dcac324dabaa0e9c7628eb..27d51aba250171ccdc2adc18d1e5221d908757da 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -181,8 +181,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        report_bist_failure(bist);
 
 #if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+       mcp55_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
 
        val = cpuid_eax(1);

diff --git a/src/pc80/usbdebug_serial.c b/src/pc80/usbdebug_serial.c
index 474882b6d1c21605e294c3d4a6ef1c2e5c4aa4fa..5dd427dd00b71446a6c1cafd4ba0e7b062ad7142 100644 (file)
--- a/src/pc80/usbdebug_serial.c
+++ b/src/pc80/usbdebug_serial.c
@@ -17,15 +17,15 @@
 
 #include "../lib/usbdebug.c"
 
-static void early_usbdebug_direct_init(void)
+static void early_usbdebug_init(void)
 {
        struct ehci_debug_info *dbg_info = (struct ehci_debug_info *)
            (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
 
-       usbdebug_direct_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info);
+       usbdebug_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info);
 }
 
-void usbdebug_direct_tx_byte(unsigned char data)
+void usbdebug_tx_byte(unsigned char data)
 {
        struct ehci_debug_info *dbg_info;
 
@@ -38,7 +38,7 @@ void usbdebug_direct_tx_byte(unsigned char data)
        }
 }
 
-void usbdebug_direct_ram_tx_byte(unsigned char data)
+void usbdebug_ram_tx_byte(unsigned char data)
 {
        struct ehci_debug_info *dbg_info;
 

diff --git a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c
index 5fded2fa3ff7b56c7bb4801e9e9148012a972c17..fe3df8e1c4874632fd7e91fa8bfda9178215f1ce 100644 (file)
--- a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c
+++ b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c
@@ -27,7 +27,7 @@
 #define EHCI_BAR 0xFEF00000
 #define EHCI_DEBUG_OFFSET 0xE0
 
-static void sb600_enable_usbdebug_direct(u32 port)
+static void sb600_enable_usbdebug(u32 port)
 {
        set_debug_port(port);
        pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5),

diff --git a/src/southbridge/amd/sb700/sb700_enable_usbdebug.c b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c
index b739fe2b5a055392e1f66eab01570a390cb7d542..771a43a44e6b098e8c36598d970d2e8ab6dd9a77 100644 (file)
--- a/src/southbridge/amd/sb700/sb700_enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c
@@ -27,7 +27,7 @@
 #define EHCI_BAR 0xFEF00000
 #define EHCI_DEBUG_OFFSET 0xE0
 
-static void sb700_enable_usbdebug_direct(u32 port)
+static void sb700_enable_usbdebug(u32 port)
 {
        set_debug_port(port);
        pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5),

diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c
index ead7bdca7f9381cfd432c9f3d43988424d9c450a..a7e07999437b8cc8132c730fc24ab6f77225ed95 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c
@@ -36,7 +36,7 @@ void set_debug_port(unsigned port)
        write32(EHCI_BAR + EHCI_DEBUG_OFFSET, dbgctl);
 }
 
-static void i82801gx_enable_usbdebug_direct(unsigned port)
+static void i82801gx_enable_usbdebug(unsigned port)
 {
        pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR);
        pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable

diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c
index 1c7a26bffcf4d8251c31b298497735b7b29ae671..b980c9e15c0968f4fbe9e3b8cf74dba4f58cf4a2 100644 (file)
--- a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c
@@ -41,7 +41,7 @@ static void set_debug_port(unsigned port)
 
 }
 
-static void mcp55_enable_usbdebug_direct(unsigned port)
+static void mcp55_enable_usbdebug(unsigned port)
 {
        set_debug_port(port);
        pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR);

diff --git a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c
index f17a79e6c449a64b764f69008a38d6f856a93932..520383ea0686dc4c47817dfdb71f3ec8278c3b04 100644 (file)
--- a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c
+++ b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c
@@ -41,7 +41,7 @@ static void set_debug_port(unsigned port)
 
 }
 
-static void sis966_enable_usbdebug_direct(unsigned port)
+static void sis966_enable_usbdebug(unsigned port)
 {
        set_debug_port(port);
        pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR);