northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig option

Originally brought up by Sven Schnelle in March 2011
http://patchwork.coreboot.org/patch/2801/
http://www.coreboot.org/pipermail/coreboot/2011-March/064277.html

On some mainboards it may be neccessary to reset early during resume
from S3 if the SLFRCS register indicates that a memory channel is not
guaranteed to be in self-refresh.

On other mainboards, such as Lenovo X60 and T60, the check always
creates false positives, effectively making it impossible to resume.

The SLFRCS register is documented on page 197 of

Mobile Intel® 945 Express Chipset Family Datasheet
Document Number: 309219-006

which is publically available, and the register indicates if a memory
channel is guaranteed to be in self-refresh mode (if bit = 1), or that
a memory channel *may or may not be* in self-refresh mode (if bit = 0).

The register can thus only be used to positively learn that memory is
in self-refresh. It is not known for sure that memory is *not* in
self-refresh. The register is reset by the PWROK signal, which *should*
go low during S3, and go high again when resuming, so it is unsurprising
that SLFRCS has already been cleared when we read the register.

Sven's measurements of the CKE signal on a ThinkPad shows that memory
remains in self-refresh indefinitely, until coreboot re-initializes the
memory controller, even when SLFRCS bits were = 0.

Boards which require a warm reset when SLFRCS bits are cleared must now
explicitly enable the check in the mainboard Kconfig file.

This commit selects the new option in all existing i945 mainboards.
A follow-up commit will remove the option for ThinkPads.

Change-Id: I02320675efb8fde05c371ef243ba5093a4da6d11
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/590
Tested-by: build bot (Jenkins)
Reviewed-by: Sven Schnelle <svens@stackframe.org>

diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index ec30859e4f25125d3a7a466306490479002b6938..6ca11e5074f3dccbbd4cf7480b49f9b3dd4965ee 100644 (file)
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_TI_PCIXX12
        select SUPERIO_SMSC_FDC37N972

diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index 02ccfab32cfb839015a1f70a62cb23dbc9f7c4d4..ac87466fda671cd6492618c67075d74678a67d74 100644 (file)
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_WINBOND_W83627EHG
        select BOARD_HAS_FADT

diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 2b0161c1fdd855ce9ade2acda4b01738a79b6b58..efc8025bb803ece4c5803679bd596d43be494474 100644 (file)
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_441
        select NORTHBRIDGE_INTEL_I945GC
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_SMSC_LPC47M15X
        select BOARD_HAS_FADT

diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig
index 01e4b2f8cfc188bba758f6b5314df0d9c7b5c936..ec5c07317e271d7bc01775a3a761825a0f6308e2 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/Kconfig
+++ b/src/mainboard/kontron/986lcd-m/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_WINBOND_W83627THG
        select BOARD_HAS_FADT

diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig
index d1abcf656aca7d2e86836079cc0e28ce94420bf5..1e4afd1f43c9f4827430fa0d681dba65d8d97092 100644 (file)
--- a/src/mainboard/lenovo/t60/Kconfig
+++ b/src/mainboard/lenovo/t60/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_NSC_PC87382
        select SUPERIO_NSC_PC87384

diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig
index 69f83a8b2483642c60d0c677c160168ed4f8c8f1..64a37612323df3a73eb3e0a68d83168d9ff2279b 100644 (file)
--- a/src/mainboard/lenovo/x60/Kconfig
+++ b/src/mainboard/lenovo/x60/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_RICOH_RL5C476
        select SUPERIO_NSC_PC87382

diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig
index 7dfcc7d7dba1795bca5bb36b51cf29f42e749ffb..d5de7dc31132212285a295fe4f0f4a4faf93bc68 100644 (file)
--- a/src/mainboard/roda/rk886ex/Kconfig
+++ b/src/mainboard/roda/rk886ex/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
        select NORTHBRIDGE_INTEL_I945GM
+       select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_TI_PCI7420
        select SUPERIO_SMSC_LPC47N227

diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 9ba47daf2c831b2c7ee76dfe8e80b31c501d8982..42cc7ce17466bc76be525e9bbf0476961f69bbb4 100644 (file)
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -53,4 +53,13 @@ config MAXIMUM_SUPPORTED_FREQUENCY
          the board supports, despite what the chipset should be
          capable of.
 
+config CHECK_SLFRCS_ON_RESUME
+       def_bool n
+       help
+         On some boards it may be neccessary to hard reset early
+         during resume from S3 if the SLFRCS register indicates that
+         a memory channel is not guaranteed to be in self-refresh.
+         On other boards the check always creates a false positive,
+         effectively making it impossible to resume.
+
 endif

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index a7fbaa44398a1645e06ec32cf8d4af1097760e49..d92c00672e4924dedd1d47679aba65fba857ba66 100644 (file)
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -294,8 +294,8 @@ static void sdram_detect_errors(struct sys_info *sysinfo)
        reg8 |= (1<<7);
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, reg8);
 
-       /* clear self refresh if not wake-up from suspend */
-       if (sysinfo->boot_path != 2) {
+       /* clear self refresh status if check is disabled or not a resume */
+       if (!CONFIG_CHECK_SLFRCS_ON_RESUME || sysinfo->boot_path != 2) {
                MCHBAR8(0xf14) |= 3;
        } else {
                /* Validate self refresh config */