K8_4RANK to QRANK
authorYinghai Lu <yinghailu@gmail.com>
Thu, 5 Oct 2006 06:59:56 +0000 (06:59 +0000)
committerYinghai Lu <yinghailu@gmail.com>
Thu, 5 Oct 2006 06:59:56 +0000 (06:59 +0000)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

18 files changed:
src/mainboard/agami/aruma/cache_as_ram_auto.c
src/mainboard/amd/serengeti_leopard/auto.c
src/mainboard/sunw/ultra40/auto.c
src/mainboard/sunw/ultra40/cache_as_ram_auto.c
src/mainboard/tyan/s2850/cache_as_ram_auto.c
src/mainboard/tyan/s2875/cache_as_ram_auto.c
src/mainboard/tyan/s2880/cache_as_ram_auto.c
src/mainboard/tyan/s2881/auto.c
src/mainboard/tyan/s2882/auto.c
src/mainboard/tyan/s2882/cache_as_ram_auto.c
src/mainboard/tyan/s2885/auto.c
src/mainboard/tyan/s2891/auto.c
src/mainboard/tyan/s2892/auto.c
src/mainboard/tyan/s2895/auto.c
src/mainboard/tyan/s4880/cache_as_ram_auto.c
src/mainboard/tyan/s4882/auto.c
src/mainboard/tyan/s4882/cache_as_ram_auto.c
src/northbridge/amd/amdk8/raminit.c

index 8d9e13cb4593ab853c02dda19d1ae7b4769c56b7..89ef1b1ad6686a62fbb77aa0e79d72c33e40b38d 100644 (file)
@@ -8,7 +8,7 @@
 #endif
 
 //use by raminit
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 //used by incoherent_ht
 //#define K8_SCAN_PCI_BUS 1
index b833f71e6c917d51bcf4713bf38d9a3b9eaa32d2..d2ddf4fdf52c775c487c2b10bdf52b010fd70a40 100644 (file)
@@ -129,7 +129,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 //#include "northbridge/amd/amdk8/setup_resource_map.c"
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 
 #if 0
index 6ab2ac5b9eac25dbf93816c10356d5b44fe57e1e..5b96d78c0a3a90f0ef39694dfb822726a489385a 100644 (file)
@@ -91,7 +91,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #if 0
index 0ec0b7bac3cca3eae24b5c8be5e4c796c023a160..3c167bbcf8fd1b07562d185d1e55b28fa7ae4910 100644 (file)
@@ -6,7 +6,7 @@
 //#define K8_SCAN_PCI_BUS 1
 
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
index 5ca8561ea7d0988671d894261021ddcb80b60f2c..bd53a693fc006b0cbfd3bec7b6ecb9518bbded17 100644 (file)
@@ -79,8 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
-
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index 4126f49448ec72c675dd58820d5f8acaa9773c34..e825c6ce6b6b13ae500d44895e60e40606edf481 100644 (file)
@@ -68,7 +68,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index ab73876184c8d03afd30993f50e1190787686f4e..bb423673d874258ca974923f3e816598475d7a14 100644 (file)
@@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
index eb1e382ee39eb9ab06a026d608949c405fa7c681..be3deaacbf06f76ef2cdaf232e9635fb394fe14f 100644 (file)
@@ -107,7 +107,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 //#include "northbridge/amd/amdk8/setup_resource_map.c"
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "sdram/generic_sdram.c"
index 700e17650f02a0053c0812a336e3d01b1eb7160b..befd4da0979b148342078f0740f55eabde78326b 100644 (file)
@@ -108,7 +108,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index c31181a8e2b74e0547624aabe5d1fcbae98afc26..dd3e6251e1b3e58b5c48726773bb2e8f4b57ba49 100644 (file)
@@ -68,7 +68,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
index f4f30737ab5de6c93c268205128ff4b3309869aa..365ac241fbaf5327adc4e58ebe7b8d7d763920b2 100644 (file)
@@ -106,7 +106,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 //#include "northbridge/amd/amdk8/setup_resource_map.c"
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 
 #if 0
index be81f89e1167bbd06a97cd6e6d0828e2f2098e4f..bf9968e4a19eb03063196ed6343c5718a0aa0116 100644 (file)
@@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index 1d19ecfafc1fc13e7c58c199e920a0575b91f452..d6553662205e56e7b60307127617fbb76d0baa47 100644 (file)
@@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "sdram/generic_sdram.c"
index 8c11f30fa7d6b06b5e327d6f7a7d6fd15b76bceb..c607b16005eb8a34b94d193f7699c3c42b67268f 100644 (file)
@@ -91,7 +91,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #if 0
index 1a16eff09ffef7f2bc4357e28b9bccd7abc93b7c..b7064778bb11773a8aa068daeada4e3b32280ebb 100644 (file)
@@ -83,7 +83,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index 4617cba9f5ea03cb5d696b1a584227e493c111c9..6daa5d8a42b336bbe0580351bc6a3e50291482b0 100644 (file)
@@ -115,7 +115,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 #include "northbridge/amd/amdk8/raminit.c"
 #if 0           
         #define ENABLE_APIC_EXT_ID 1
index 00378dfb9b823040ab175fe9d13590ca5b1ebe74..e3b013bb559e795b6eabda0b37e703aaac884460 100644 (file)
@@ -92,7 +92,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
index 9a028bf2e625aa76682defc911e07c1351e4b785..84db1e2055249aa1d9ff5df4cdeea7adc63a6e90 100644 (file)
@@ -17,8 +17,8 @@
 # error "CONFIG_LB_MEM_TOPK must be a power of 2"
 #endif
 
-#ifndef K8_4RANK_DIMM_SUPPORT
-#define K8_4RANK_DIMM_SUPPORT 0
+#ifndef QRANK_DIMM_SUPPORT
+#define QRANK_DIMM_SUPPORT 0
 #endif
 
 #if defined (__GNUC__)
@@ -631,7 +631,7 @@ struct dimm_size {
        unsigned long side2;
        unsigned long rows;
        unsigned long col;
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        unsigned long rank;
 #endif
 };
@@ -645,7 +645,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device)
        sz.side2 = 0;
        sz.rows = 0;
        sz.col = 0;
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        sz.rank = 0;
 #endif
 
@@ -689,7 +689,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device)
        if ((value != 2) && (value != 4 )) {
                goto val_err;
        }
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        sz.rank = value;
 #endif
 
@@ -718,7 +718,7 @@ hw_err:
        sz.side2 = 0;
        sz.rows = 0;
        sz.col = 0;
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        sz.rank = 0;
 #endif
  out:
@@ -766,7 +766,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
        /* Set the appropriate DIMM base address register */
        pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+0)<<2), base0);
        pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+1)<<2), base1);
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        if(sz.rank == 4) {
                pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+4)<<2), base0);
                pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+5)<<2), base1);
@@ -777,7 +777,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
        if (base0) {
                dch = pci_read_config32(ctrl->f2, DRAM_CONFIG_HIGH);
                dch |= DCH_MEMCLK_EN0 << index;
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
                if(sz.rank == 4) {
                        dch |= DCH_MEMCLK_EN0 << (index + 2);
                }
@@ -800,7 +800,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz,
 
        map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP);
        map &= ~(0xf << (index * 4));
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
         if(sz.rank == 4) {
                 map &= ~(0xf << ( (index + 2) * 4));
         }
@@ -811,7 +811,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz,
        if (sz.side1 >= (25 +3)) {
                if(is_cpu_pre_d0()) {
                        map |= (sz.side1 - (25 + 3)) << (index *4);
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
                        if(sz.rank == 4) {
                              map |= (sz.side1 - (25 + 3)) << ( (index + 2) * 4);
                                }
@@ -819,7 +819,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz,
                }
                else {
                        map |= cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << (index*4);
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
                        if(sz.rank == 4) {
                               map |=  cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << ( (index + 2) * 4);
                                }
@@ -1538,7 +1538,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
        }
 #if 0
 //down speed for full load 4 rank support
-#if K8_4RANK_DIMM_SUPPORT
+#if QRANK_DIMM_SUPPORT
        if(dimm_mask == (3|(3<<DIMM_SOCKETS)) ) {
                int ranks = 4;
                for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
@@ -1804,7 +1804,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa
 {
        uint32_t dcl;
        int value;
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        int rank;
 #endif
        int dimm;
@@ -1813,7 +1813,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa
                return -1;
        }
 
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        rank = spd_read_byte(ctrl->channel0[i], 5);       /* number of physical banks */
        if (rank < 0) {
                return -1;      
@@ -1821,7 +1821,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa
 #endif
 
        dimm = 1<<(DCL_x4DIMM_SHIFT+i);
-#if K8_4RANK_DIMM_SUPPORT == 1
+#if QRANK_DIMM_SUPPORT == 1
        if(rank==4) {
                dimm |= 1<<(DCL_x4DIMM_SHIFT+i+2);
        }