http://www.coreboot.org/pipermail/coreboot/2007-October/025740.html

This function is not called right now,... Please step in and fix up your code,
folks.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/include/pc80/i8254.h b/src/include/pc80/i8254.h
new file mode 100644 (file)
index 0000000..b0d3a93
--- /dev/null
+++ b/src/include/pc80/i8254.h
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#ifndef PC80_I8254_H
+#define PC80_I8254_H
+
+/* Ports for the 8254 timer chip */
+#define TIMER0_PORT    0x40
+#define TIMER1_PORT    0x41
+#define TIMER2_PORT     0x42
+#define TIMER_MODE_PORT 0x43
+
+/* Meaning of the mode bits */
+#define TIMER0_SEL      0x00
+#define TIMER1_SEL      0x40
+#define TIMER2_SEL      0x80
+#define READBACK_SEL    0xC0
+
+#define LATCH_COUNT     0x00
+#define LOBYTE_ACCESS   0x10
+#define HIBYTE_ACCESS   0x20
+#define WORD_ACCESS     0x30
+
+#define MODE0           0x00
+#define MODE1           0x02
+#define MODE2           0x04
+#define MODE3           0x06
+#define MODE4           0x08
+#define MODE5           0x0A
+
+#define BINARY_COUNT    0x00
+#define BCD_COUNT       0x01
+
+/* Timers tick over at this rate */
+#define TICKS_PER_MS    1193
+
+/* Parallel Peripheral Controller Port B */
+#define PPC_PORTB       0x61
+
+/* Meaning of the port bits */
+#define PPCB_T2OUT      0x20    /* Bit 5 */
+#define PPCB_SPKR       0x02    /* Bit 1 */
+#define PPCB_T2GATE     0x01    /* Bit 0 */
+
+#endif

diff --git a/src/pc80/Config.lb b/src/pc80/Config.lb
index e05b76954c5629270605ef9726f2c2a3de6d44aa..24af51c2081cb6c026e66e85728e1c905441e4f2 100644 (file)
--- a/src/pc80/Config.lb
+++ b/src/pc80/Config.lb
@@ -5,7 +5,6 @@ uses CONFIG_ARCH_X86
 object mc146818rtc.o
 object isa-dma.o
 object i8259.o 
-#object udelay_timer2.o CONFIG_UDELAY_TIMER2
 
 if CONFIG_UDELAY_IO
        object udelay_io.o

diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc
index 0ef591497abb0dc9086014107d210c49edfd56b2..c7c0cd5d0a304bee0209a5361588de483b78b0dc 100644 (file)
--- a/src/pc80/Makefile.inc
+++ b/src/pc80/Makefile.inc
@@ -1,7 +1,6 @@
 obj-y += mc146818rtc.o
 obj-y += isa-dma.o
 obj-y += i8259.o 
-#obj-y += udelay_timer2.o CONFIG_UDELAY_TIMER2
 obj-$(CONFIG_UDELAY_IO) += udelay_io.o
 obj-y += keyboard.o
 

diff --git a/src/pc80/i8254.c b/src/pc80/i8254.c
new file mode 100644 (file)
index 0000000..e5dc40b
--- /dev/null
+++ b/src/pc80/i8254.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <pc80/i8254.h>
+#include <console/console.h>
+
+/* Initialize i8254 timers */
+
+void setup_i8254(void)
+{
+       /* Timer 0 (taken from biosemu) */
+       outb(TIMER0_SEL|WORD_ACCESS|MODE3|BINARY_COUNT, TIMER_MODE_PORT);
+       outb(0x00, TIMER0_PORT);
+       outb(0x00, TIMER0_PORT);
+
+       /* Timer 1 */
+       outb(TIMER1_SEL|LOBYTE_ACCESS|MODE3|BINARY_COUNT, TIMER_MODE_PORT);
+       outb(0x12, TIMER1_PORT);
+}
+
+#ifdef CONFIG_UDELAY_TIMER2
+static void load_timer2(unsigned int ticks)
+{
+        /* Set up the timer gate, turn off the speaker */
+        outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
+        outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT);
+        outb(ticks & 0xFF, TIMER2_PORT);
+        outb(ticks >> 8, TIMER2_PORT);
+}
+
+
+void udelay(int usecs)
+{
+        load_timer2((usecs*TICKS_PER_MS)/1000);
+        while ((inb(PPC_PORTB) & PPCB_T2OUT) == 0)
+                ;
+}
+#endif