- pci_device.c fixes for generic pci bridges to zero the unused portion of bridge...

- coherent_ht.c remove dead idle loop.
- raminit.c Enable a 64MB mmio window just below 4GB

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index c4b1cbeb0c1736970606816e0ba8fbf4f0ea9c4f..25c39f8f9ae2db3c99f63881635ff16f4c646b4d 100644 (file)
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -303,6 +303,8 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
                        IORESOURCE_IO, IORESOURCE_IO);
                pci_write_config8(dev, PCI_IO_BASE,  base >> 8);
                pci_write_config8(dev, PCI_IO_LIMIT, limit >> 8);
+               pci_write_config16(dev, PCI_IO_BASE_UPPER16, 0);
+               pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, 0);
        }
        else if (resource->index == PCI_MEMORY_BASE) {
                /* set the memory range
@@ -322,6 +324,8 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
                        IORESOURCE_MEM | IORESOURCE_PREFETCH);
                pci_write_config16(dev, PCI_PREF_MEMORY_BASE,  base >> 16);
                pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, limit >> 16);
+               pci_write_config32(dev, PCI_PREF_BASE_UPPER32, 0);
+               pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, 0);
        }
        else {
                printk_err("ERROR: invalid resource->index %x\n",

diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 96321637b31e47fe9321b9a452eda31047c8461c..516f0fc6ae283b12e166fe4e2212626c4866753f 100644 (file)
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -402,7 +402,7 @@ static void disable_probes(void)
        print_debug("Disabling read/write/fill probes for UP... ");
 
        val=pci_read_config32(NODE_HT(0), 0x68);
-       val |= 0x0000040f;
+       val |= (1<<10)|(1<<9)|(1<<8)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1 << 0);
        pci_write_config32(NODE_HT(0), 0x68, val);
 
        print_debug("done.\r\n");
@@ -475,7 +475,6 @@ static bool check_connection(u8 src, u8 dest, u8 link)
 {
        /* this function does 2 things:
         * 1) detect whether the coherent HT link is connected.
-         *    After this step follows a small idle loop.
         * 2) verify that the coherent hypertransport link
         *    is established and actually working by reading the
         *    remote node's vendor/device id
@@ -492,9 +491,6 @@ static bool check_connection(u8 src, u8 dest, u8 link)
        if ( (val&0x17) != 0x03)
                return 0;
 
-       /* idle loop to make sure the link is established */
-       for (val=0;val<16;val++);
-
        /* 2) */
         val=pci_read_config32(NODE_HT(dest),0);
        if(val != 0x11001022)

diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 1c1e475f2c10ff44c13c81f0b1171c5a58c83154..fac6e1adeea78bd5d23c11556799c3c0402ef14f 100644 (file)
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -315,7 +315,7 @@ static void setup_default_resource_map(void)
        PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00,
 
        /* Memory-Mapped I/O Base i Registers
         * F1:0x80 i = 0
@@ -350,7 +350,7 @@ static void setup_default_resource_map(void)
        PCI_ADDR(0, 0x18, 1, 0xA0), 0x000000f0, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00000000,
+       PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003,
 
        /* PCI I/O Limit i Registers
         * F1:0xC4 i = 0