/*
* Fill.
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM fill: ");
for(addr = start; addr < stop ; addr += 4) {
/* Display address being filled */
if (!(addr & 0xfffff)) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
write_phys(addr, (u32)addr);
};
/* Display final address */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr);
#else
print_debug_hex32(addr);
/*
* Verify.
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM verify: ");
unsigned long value;
/* Display address being tested */
if (!(addr & 0xfffff)) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
value = read_phys(addr);
if (value != addr) {
/* Display address with error */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value);
#else
print_err("Fail: @0x");
#endif
i++;
if(i>256) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Aborting.\n");
#else
print_debug("Aborting.\n");
}
}
/* Display final address */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx", addr);
#else
print_debug_hex32(addr);
#endif
if (i) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
#else
print_debug("\nDRAM did _NOT_ verify!\n");
die("DRAM ERROR");
}
else {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\nDRAM range verified.\n");
#else
print_debug("\nDRAM range verified.\n");
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop);
#else
print_debug("Testing DRAM : ");
/* Make sure we don't read before we wrote */
phys_memory_barrier();
ram_verify(start, stop);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Done.\n");
#else
print_debug("Done.\n");
for(i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x:",i);
#else
print_debug("\n");
#endif
}
val = pci_read_config8(dev, i);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x", val);
#else
print_debug_char(' ');
device = ctrl->channel0[i];
if (device) {
int j;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
#else
print_debug("dimm: ");
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
break;
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
device = ctrl->channel1[i];
if (device) {
int j;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
#else
print_debug("dimm: ");
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
break;
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
for(device = 1; device < 0x80; device++) {
int j;
if( smbus_read_byte(device, 0) < 0 ) continue;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "smbus: %02x", device);
#else
print_debug("smbus: ");
break;
}
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ",j);
#else
print_debug("\n");
#endif
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
{
int i;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%04x:\n", port);
#else
print_debug_hex16(port);
for(i=0;i<256;i++) {
uint8_t val;
if ((i & 0x0f) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x:", i);
#else
print_debug_hex8(i);
#endif
}
val = inb(port);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x",val);
#else
print_debug_char(' ');
print_debug("dump_mem:");
for(i=start;i<end;i++) {
if((i & 0xf)==0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%08x:", i);
#else
print_debug("\n");
print_debug(":");
#endif
}
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
#else
print_debug(" ");