None of the cs5536 settings in devicetree.cb were ever used and nobody noticed.
authorStefan Reinauer <stepan@coresystems.de>
Thu, 22 Apr 2010 10:44:08 +0000 (10:44 +0000)
committerStefan Reinauer <stepan@openbios.org>
Thu, 22 Apr 2010 10:44:08 +0000 (10:44 +0000)
Fix it!

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/cpu/amd/gx2def.h
src/southbridge/amd/cs5536/cs5536.c

index a24704aa5e07c9d143674e8090a921ddf8946cc8..ec99b953956b646e7c8ed191a3a053c19e62ee60 100644 (file)
 #define PMLogic_BASE    (              0x9D00)
 
 
+#if !defined(__ROMCC__)  && !defined(ASSEMBLY)
+#if defined(__PRE_RAM__)
+#else
+void cpubug(void);
+#endif
+#endif
+
 #endif /* CPU_AMD_GX2DEF_H */
index f5de337bbea4bbe7886cf0968f0f98a6937e3685..43f3b1290e9a1331f49500882e00c8a02f0d7a01 100644 (file)
@@ -527,10 +527,24 @@ void chipsetinit(void)
        device_t dev;
        msr_t msr;
        u32 msrnum;
-       struct southbridge_amd_cs5536_config *sb =
-           (struct southbridge_amd_cs5536_config *)dev->chip_info;
+       struct southbridge_amd_cs5536_config *sb;
        struct msrinit *csi;
 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+                       PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
+
+       if (!dev) {
+               printk(BIOS_ERR, "CS5536 not found.\n");
+               return;
+       }
+
+       sb = (struct southbridge_amd_cs5536_config *)dev->chip_info;
+
+       if (!sb) {
+               printk(BIOS_ERR, "CS5536 configuration not found.\n");
+               return;
+       }
+
        post_code(P80_CHIPSET_INIT);
 
        /* we hope NEVER to be in coreboot when S3 resumes
@@ -599,6 +613,12 @@ static void southbridge_init(struct device *dev)
         */
 
        printk(BIOS_ERR, "cs5536: %s\n", __func__);
+
+       if (!sb) {
+               printk(BIOS_ERR, "CS5536 configuration not found.\n");
+               return;
+       }
+
        setup_i8259();
        lpc_init(sb);
        uarts_init(sb);