Make fam10 build (but not boot due to bootblock size problems.)

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/Kconfig b/src/Kconfig
index ebdd1b44bc490bed7b4762aabe1b83674c1bc849..4e365c642cf6aaa6a3382c942447d1d6c69b8141 100644 (file)
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -135,8 +135,8 @@ config MMCONF_SUPPORT
        default n
 
 config LB_MEM_TOPK
-       int
-       default 2048
+       hex
+       default 0x800
 
 config COMPRESSED_PAYLOAD_LZMA
        bool

diff --git a/src/cpu/amd/Makefile.inc b/src/cpu/amd/Makefile.inc
index 77285285fad6234fd55a53235936e057997f8b80..3944270d516924728a1250573b3b58c8ce64b588 100644 (file)
--- a/src/cpu/amd/Makefile.inc
+++ b/src/cpu/amd/Makefile.inc
@@ -1,4 +1,5 @@
 subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
+subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207
 subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
 subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
 subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940

diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 9d31c27239561c74691cf2e65b4099a613141425..a13a86f32ad4bc68d846c17d146c9fc5891de699 100644 (file)
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -28,16 +28,16 @@ config USE_DCACHE_RAM
 
 config DCACHE_RAM_BASE
        hex
-       default 0xc8000
+       default 0xc4000
        depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_SIZE
        hex
-       default 0x08000
+       default 0x0c000
        depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
-       default 0x01000
+       default 0x04000
        depends on CPU_AMD_MODEL_10XXX
 

diff --git a/src/cpu/amd/quadcore/Makefile.inc b/src/cpu/amd/quadcore/Makefile.inc
new file mode 100644 (file)
index 0000000..d53dc3d
--- /dev/null
+++ b/src/cpu/amd/quadcore/Makefile.inc
@@ -0,0 +1 @@
+obj-y += amd_sibling.o

diff --git a/src/cpu/amd/socket_F_1207/Kconfig b/src/cpu/amd/socket_F_1207/Kconfig
index 7a381724fb054764b59bd18bdf815a80267a096e..19b5b20cebad832853af43153084bb95538b4797 100644 (file)
--- a/src/cpu/amd/socket_F_1207/Kconfig
+++ b/src/cpu/amd/socket_F_1207/Kconfig
@@ -35,10 +35,20 @@ config CAR_FAM10
 
 config CBB
        hex
-       default 0xff
+       default 0x0
        depends on CPU_AMD_SOCKET_F_1207
 
 config CDB
        hex
-       default 0x0
+       default 0x18
+       depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_BASE
+       hex
+       default 0xfff80000
+       depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_SIZE
+       hex
+       default 0x80000
        depends on CPU_AMD_SOCKET_F_1207

diff --git a/src/cpu/amd/socket_F_1207/Makefile.inc b/src/cpu/amd/socket_F_1207/Makefile.inc
index f7e13e0328348ea9d80e2e6530495e587237196b..382634e12fd03d8cf1cc3ffb397bfb1a21cc3e25 100644 (file)
--- a/src/cpu/amd/socket_F_1207/Makefile.inc
+++ b/src/cpu/amd/socket_F_1207/Makefile.inc
@@ -10,5 +10,6 @@ subdirs-y += ../../x86/mmx
 subdirs-y += ../../x86/sse
 subdirs-y += ../../x86/lapic
 subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
index da4ea1faf288a7d673aaad33f4edd2fab8b16f88..1feca96edbf192b110cee4599266582046433a51 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -13,9 +13,8 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10
        select USE_DCACHE_RAM
        select HAVE_HARD_RESET
        select IOAPIC
-       select AP_CODE_IN_CAR
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
-       select WAIT_BEFORE_CPUS_INIT
+       select SERIAL_CPU_INIT
        select AMDMCT
        select HAVE_ACPI_TABLES
 
@@ -24,24 +23,9 @@ config MAINBOARD_DIR
        default amd/serengeti_cheetah_fam10
        depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
 config APIC_ID_OFFSET
        hex
-       default 0x8
+       default 0x0
        depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config LB_CKS_RANGE_END
@@ -100,11 +84,6 @@ config USE_INIT
        default n
        depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config SERIAL_CPU_INIT
-       bool
-       default n
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
 config IRQ_SLOT_COUNT
        int
        default 11
@@ -115,3 +94,37 @@ config AMD_UCODE_PATCH_FILE
        default "mc_patch_01000095.h"
        depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
+config LB_MEM_TOPK
+       hex
+       default 0x4000
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config HEAP_SIZE
+       hex
+       default 0xc0000
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ACPI_SSDTX_NUM
+       int
+       default 31
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+       hex
+       default 0x2b80
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+       hex
+       default 0x1022
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ENABLE_APIC_EXT_ID
+       bool
+       default y
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config LIFT_BSP_APIC_ID
+       bool
+       default y
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
index 19e58bd8ae5a8810df54fac97b925118f47386f0..0966e03501d982c12d9aafc70c3e58bb4e824207 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -29,11 +29,13 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
 obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
 obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
 
-# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o
-driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+# ./ssdt.o is in northbridge/amd/amdfam10/Makefile.inc
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt2.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt3.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt4.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt5.o
+
+driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
 
 # This is part of the conversion to init-obj and away from included code.
 
@@ -54,32 +56,38 @@ ldscript-y += ../../../../src/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
-       iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
-       mv dsdt.hex $@
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+       iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $<
+       mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
        $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
-       iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
-       perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
-       mv pci2.hex ssdt2.c
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
+       iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci2 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex
+       mv $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
+       iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci3 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex
+       mv $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex $@
 
-$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
-       iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
-       perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
-       mv pci3.hex ssdt3.c
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
+       iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci4 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex
+       mv $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex $@
 
-$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
-       iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
-       perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
-       mv pci4.hex ssdt4.c
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl
+       iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci5 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex
+       mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
        $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
        perl -e 's/\.rodata/.rom.data/g' -pi $@
        perl -e 's/\.text/.section .rom.text/g' -pi $@
 
+
 endif
 

diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 313db3a890b480c3f61bec3925ba415d3b175a7e..2c626625e2a206df15d8ce8f270fb8cff58526aa 100644 (file)
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -26,4 +26,14 @@ config AGP_APERTURE_SIZE
        default 0x4000000
        depends on NORTHBRIDGE_AMD_AMDFAM10
 
+config HYPERTRANSPORT_PLUGIN_SUPPORT
+       bool
+       default y
+       depends on NORTHBRIDGE_AMD_AMDFAM10
+
+config HT3_SUPPORT
+       bool
+       default y
+       depends on NORTHBRIDGE_AMD_AMDFAM10
+
 source src/northbridge/amd/amdfam10/root_complex/Kconfig

diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc
index 79ed767f7358fd31020325d16f0a9fc546fa9099..9cca322c23ed53ea3b76eb69f3884efcfffdec85 100644 (file)
--- a/src/northbridge/amd/amdfam10/Makefile.inc
+++ b/src/northbridge/amd/amdfam10/Makefile.inc
@@ -10,3 +10,36 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.o
 obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.o
 
 obj-y += get_pci1234.o
+
+ifdef POST_EVALUATION
+$(obj)/northbridge/amd/amdfam10/ssdt.c: $(src)/northbridge/amd/amdfam10/ssdt.dsl
+       iasl -p $(CURDIR)/ssdt -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex
+       mv ssdt.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr1.c: $(src)/northbridge/amd/amdfam10/sspr1.dsl
+       iasl -p $(CURDIR)/sspr1 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex
+       mv sspr1.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr2.c: $(src)/northbridge/amd/amdfam10/sspr2.dsl
+       iasl -p $(CURDIR)/sspr2 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex
+       mv sspr2.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr3.c: $(src)/northbridge/amd/amdfam10/sspr3.dsl
+       iasl -p $(CURDIR)/sspr3 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex
+       mv sspr3.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr4.c: $(src)/northbridge/amd/amdfam10/sspr4.dsl
+       iasl -p $(CURDIR)/sspr4 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex
+       mv sspr4.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr5.c: $(src)/northbridge/amd/amdfam10/sspr5.dsl
+       iasl -p $(CURDIR)/sspr5 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex
+       mv sspr5.hex $@
+endif
+