I've checked Revision Guide for AMD Family10h processors (#41322) rev

3.74 June 2010 for errata 351 and it agrees with the comment on
setting ForceFullT0= 000b but I believe the code didn't honor the
comment.

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
index 7bf9ccb52db0e4a7aa02541080742a908ee95c5e..2fbfbb26fc127ae9c05ebceac99b89e53f19fba2 100644 (file)
--- a/src/cpu/amd/model_10xxx/defaults.h
+++ b/src/cpu/amd/model_10xxx/defaults.h
@@ -161,7 +161,7 @@ static const struct {
 
        /* Link Global Extended Control Register */
        { 0, 0x16C,  AMD_DRBA23_RBC2, AMD_PTYPE_ALL,
-         0x00000014, 0x0000003F },     /* [15:13] ForceFullT0 = 0b,
+         0x00000014, 0x0000E03F },     /* [15:13] ForceFullT0 = 0b,
                                                                 * Set T0Time 14h per BKDG */