[PATCH] libpayload: Add pci_set_bus_master() function
authorJordan Crouse <jordan.crouse@amd.com>
Mon, 20 Oct 2008 16:51:20 +0000 (16:51 +0000)
committerJordan Crouse <jordan.crouse@amd.com>
Mon, 20 Oct 2008 16:51:20 +0000 (16:51 +0000)
Allow the payload to enable a PCI device as a bus master.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

payloads/libpayload/drivers/pci.c
payloads/libpayload/include/pci.h

index fc1940afbc8313824a05c513aee27c92463a4f85..be92613e886b6b9d1a2d2d192d09b6089b7c731a 100644 (file)
@@ -112,3 +112,11 @@ u32 pci_read_resource(pcidev_t dev, int bar)
 {
        return pci_read_config32(dev, 0x10 + (bar * 4));
 }
+
+void pci_set_bus_master(pcidev_t dev)
+{
+       u16 val = pci_read_config16(dev, REG_COMMAND);
+       val |= REG_COMMAND_BM;
+       pci_write_config16(dev, REG_COMMAND, val);
+}
+
index 1b51f8cd78e0430886f810f9e8b63176e441358d..93d1267ef50997676847282376329de8adc8f543 100644 (file)
 typedef u32 pcidev_t;
 
 #define REG_VENDOR_ID   0x00
-#define REG_DEVICE_ID   0x04
+#define REG_COMMAND     0x04
 #define REG_HEADER_TYPE 0x0E
 #define REG_PRIMARY_BUS 0x18
 
+#define REG_COMMAND_BM  (1 << 2)
+
 #define HEADER_TYPE_NORMAL  0
 #define HEADER_TYPE_BRIDGE  1
 #define HEADER_TYPE_CARDBUS 2
@@ -64,4 +66,6 @@ void pci_write_config32(u32 device, u16 reg, u32 val);
 int pci_find_device(u16 vid, u16 did, pcidev_t *dev);
 u32 pci_read_resource(pcidev_t dev, int bar);
 
+void pci_set_bus_master(pcidev_t dev);
+
 #endif