Add code to set the clock speed for Winbond W83627THF/THG.

Change-Id: I984404dd1df50b3ba423ac610283b9bf8bca5a31
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/412
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

diff --git a/src/superio/winbond/w83627thg/early_serial.c b/src/superio/winbond/w83627thg/early_serial.c
index 559e9827fcbbebd41f4fcf93342f9247313b9446..b80e51409712c79e2e79b07b5256e008e93be328 100644 (file)
--- a/src/superio/winbond/w83627thg/early_serial.c
+++ b/src/superio/winbond/w83627thg/early_serial.c
@@ -45,3 +45,14 @@ static void inline w83627thg_enable_serial(device_t dev, u16 iobase)
        pnp_set_enable(dev, 1);
        pnp_exit_ext_func_mode(dev);
 }
+
+#ifndef __ROMCC__
+void w83627thg_set_clksel_48(device_t dev) {
+       u8 reg8;
+       pnp_enter_ext_func_mode(dev);
+       reg8 = pnp_read_config(dev, 0x24);
+       reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
+       pnp_write_config(dev, 0x24, reg8);
+       pnp_exit_ext_func_mode(dev);
+}
+#endif

diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h
index 73be5448890a545289f38e5ff09c6512e8b3ff0f..99ff565593c7e29d7dad59e15b0d5c73cc585ede 100644 (file)
--- a/src/superio/winbond/w83627thg/w83627thg.h
+++ b/src/superio/winbond/w83627thg/w83627thg.h
@@ -34,4 +34,6 @@
 #define W83627THG_ACPI            10
 #define W83627THG_HWM             11   /* Hardware monitor */
 
+void w83627thg_set_clksel_48(device_t dev);
+
 #endif