Instead of requiring users to modify qemu to allow writes to

0xc0000-0xfffff, have coreboot qemu support enable the memory range at
startup.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c b/src/mainboard/emulation/qemu-x86/mainboard.c
index 7ab02d93c4d58bf0682413227227ae09bb1b86f4..e4c978551fc6235d36982feb178df3dc272d242e 100644 (file)
--- a/src/mainboard/emulation/qemu-x86/mainboard.c
+++ b/src/mainboard/emulation/qemu-x86/mainboard.c
@@ -10,15 +10,15 @@
 /* not sure how these are routed in qemu */
 static const unsigned char enetIrqs[4] = { 11, 0, 0, 0 };
 
-static void qemu_init(device_t dev)
+static void qemu_nb_init(device_t dev)
 {
-       /* The VGA OPROM already lives at 0xc0000,
-        * force coreboot to use it.
-        */
-       dev->on_mainboard = 1;
-
-       /* Now do the usual initialization */
-       pci_dev_init(dev);
+       /* Map memory at 0xc0000 - 0xfffff */
+       int i;
+       uint8_t v = pci_read_config8(dev, 0x59);
+       v |= 0x30;
+       pci_write_config8(dev, 0x59, v);
+       for (i=0; i<6; i++)
+       pci_write_config8(dev, 0x5a + i, 0x33);
 
        /* This sneaked in here, because Qemu does not
         * emulate a SuperIO chip
@@ -32,6 +32,31 @@ static void qemu_init(device_t dev)
        pci_assign_irqs(0, 3, enetIrqs);
 }
 
+static struct device_operations nb_operations = {
+       .read_resources   = pci_dev_read_resources,
+       .set_resources    = pci_dev_set_resources,
+       .enable_resources = pci_dev_enable_resources,
+       .init             = qemu_nb_init,
+       .ops_pci          = 0,
+};
+
+static const struct pci_driver nb_driver __pci_driver = {
+       .ops = &nb_operations,
+       .vendor = 0x8086,
+       .device = 0x1237,
+};
+
+static void qemu_init(device_t dev)
+{
+       /* The VGA OPROM already lives at 0xc0000,
+        * force coreboot to use it.
+        */
+       dev->on_mainboard = 1;
+
+       /* Now do the usual initialization */
+       pci_dev_init(dev);
+}
+
 static struct device_operations vga_operations = {
        .read_resources   = pci_dev_read_resources,
        .set_resources    = pci_dev_set_resources,