Fix AMD Fam12 CBMEM allocation

The Fam12 northbridge.c had hardcoded the CBMEM size. It should use
the one in cbmem.h instead.

Change-Id: I1eca18e21fa59ae32e802d8452e42e8b7a3575cf
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/795
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>

diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 2c039d2b4efeed89946a26cf679ef24726a1f172..a3afecb217ebfe30aacea5f6129899d1c79beded 100644 (file)
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -28,6 +28,7 @@
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
+#include <cbmem.h>
 
 #include <cpu/x86/lapic.h>
 
@@ -337,11 +338,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
 }
 #endif
 
-#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
-#endif
-
 #if CONFIG_GFXUMA == 1
 extern uint64_t uma_memory_base, uma_memory_size;
 
@@ -719,12 +715,13 @@ printk(BIOS_DEBUG, "adsr: mmio_basek=%08x, basek=%08x, limitk=%08x\n",  mmio_bas
                     if (high_tables_base==0) {
                     /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA == 1
-                        high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+                        high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
 #else
-                        high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+                        high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
 #endif
-                        high_tables_size = HIGH_TABLES_SIZE * 1024;
-                        printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
+                        high_tables_size = HIGH_MEMORY_SIZE;
+                        printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
+                                (u32)(high_tables_size / 1024),
                                  high_tables_base);
                     }
 #endif
@@ -749,12 +746,12 @@ printk(BIOS_DEBUG, "adsr: mmio_basek=%08x, basek=%08x, limitk=%08x\n",  mmio_bas
         if (high_tables_base==0) {
         /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA == 1
-            high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+            high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
             printk(BIOS_DEBUG, "  adsr - uma_memory_base = %x.\n",uma_memory_base);
 #else
-            high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+            high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
 #endif
-            high_tables_size = HIGH_TABLES_SIZE * 1024;
+            high_tables_size = HIGH_MEMORY_SIZE;
         }
 #endif
     }