static devices
authorGreg Watson <jarrah@users.sourceforge.net>
Wed, 23 Jul 2003 18:20:17 +0000 (18:20 +0000)
committerGreg Watson <jarrah@users.sourceforge.net>
Wed, 23 Jul 2003 18:20:17 +0000 (18:20 +0000)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/boot/hardwaremain.c
src/include/device/chip.h
src/superio/NSC/pc97307/Config.lb
src/superio/NSC/pc97307/superio.c

index 0477253ec449ef689494bbe53784621bf565e5a9..4bb23fde8038527c2e642f0a424b6693bb0de394 100644 (file)
@@ -35,6 +35,7 @@ it with the version available from LANL.
 #include <part/sizeram.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/chip.h>
 #include <delay.h>
 #if 0
 #include <part/mainboard.h>
@@ -146,6 +147,9 @@ void hardwaremain(int boot_complete)
        unsigned long totalmem;
 
        post_code(0x80);
+       
+       CONFIGURE(CONF_PASS_PRE_CONSOLE);
+
        /* displayinit MUST PRECEDE ALL PRINTK! */
        console_init();
        
@@ -163,6 +167,7 @@ void hardwaremain(int boot_complete)
        }
 #endif
        init_timer();
+       CONFIGURE(CONF_PASS_PRE_PCI);
 
        /* pick how to scan the bus. This is first so we can get at memory size. */
        printk_info("Finding PCI configuration type.\n");
@@ -215,6 +220,8 @@ void hardwaremain(int boot_complete)
         */
        lb_mem = write_tables(mem, processor_map);
 
+       CONFIGURE(CONF_PASS_PRE_PCI);
+
        elfboot(lb_mem);
 }
 
index 574df1d4e04f89c54776d7646be480dcdf399020..20247b9209b8871f1b09daf4facb6775d2158a88 100644 (file)
@@ -7,9 +7,9 @@
 
 /* some of the types of resources chips can control */
 #ifndef CONFIG_CHIP_CONFIGURE
-#define CHIP_CONFIGURE(chip, pass) chip_configure(chip, pass)
+#define CONFIGURE(dev, pass) chip_configure(chip, pass)
 #else
-#define CHIP_CONFIGURE(chip, pass)
+#define CONFIGURE(dev, pass)
 #endif
 
 struct com_ports {
@@ -28,13 +28,13 @@ struct lpt_ports {
 };
 
 enum chip_pass {
-       CHIP_PASS_PRE_CONSOLE,
-       CHIP_PASS_PRE_PCI,
-       CHIP_PASS_PRE_DEVICE_ENUMERATE,
-       CHIP_PASS_PRE_DEVICE_CONFIGURE,
-       CHIP_PASS_PRE_DEVICE_ENABLE,
-       CHIP_PASS_PRE_DEVICE_INITIALIZE,
-       CHIP_PASS_PRE_BOOT
+       CONF_PASS_PRE_CONSOLE,
+       CONF_PASS_PRE_PCI,
+       CONF_PASS_PRE_DEVICE_ENUMERATE,
+       CONF_PASS_PRE_DEVICE_CONFIGURE,
+       CONF_PASS_PRE_DEVICE_ENABLE,
+       CONF_PASS_PRE_DEVICE_INITIALIZE,
+       CONF_PASS_PRE_BOOT
 };
 
 
index eac204154eabe1f80dff690578da529cb6163ebc..94a888e7678fdc206866ada1c9463ea10fc0531c 100644 (file)
@@ -1 +1,2 @@
+config chip.h
 object superio.c
index 100fa146d97330d56a7dba291bbddb17f4d3d746..1f7a3b1d98e324368e1268ea6a8c1490a9828f77 100644 (file)
@@ -17,7 +17,7 @@ void sio_enable(struct chip *chip, enum chip_pass pass)
        struct superio_NSC_pc97307_config *conf = (struct superio_NSC_pc97307_config *)chip->chip_info;
 
        switch (pass) {
-       case CHIP_PRE_CONSOLE:
+       case CONF_PASS_PRE_CONSOLE:
                /* Enable Super IO Chip */
                pnp_output(0x07, 6); /* LD 6 = UART1 */
                pnp_output(0x30, 0); /* Dectivate */