can not enable cache for ram in auto.c

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/mtrr/amd_earlymtrr.c b/src/cpu/amd/mtrr/amd_earlymtrr.c
index 6606a92e9b69dce9f2307dd3091b8fef8a564e0c..d0647ac135639b0ac32c6793f998633c2843ea79 100644 (file)
--- a/src/cpu/amd/mtrr/amd_earlymtrr.c
+++ b/src/cpu/amd/mtrr/amd_earlymtrr.c
@@ -40,23 +40,6 @@ static void do_amd_early_mtrr_init(const unsigned long *mtrr_msrs)
         msr.lo = (((CONFIG_LB_MEM_TOPK << 10) + TOP_MEM_MASK) & ~TOP_MEM_MASK);
         wrmsr(TOP_MEM, msr);
 
-       /* Enable caching for 0 - 1MB using variable mtrr */
-#if 0
-       set_var_mtrr(0, 0x00000000, (CONFIG_LB_MEM_TOPK << 10), MTRR_TYPE_WRBACK);
-#else
-        msr = rdmsr(0x200);
-        msr.hi = 0x00000000;
-        msr.lo &= 0x00000f00;
-        msr.lo |= 0x00000000 | MTRR_TYPE_WRBACK;
-        wrmsr(0x200, msr);
-
-        msr = rdmsr(0x201);
-        msr.hi = 0x0000000f;
-        msr.lo &= 0x000007ff;
-        msr.lo |= (~((CONFIG_LB_MEM_TOPK << 10) - 1)) | 0x800;
-        wrmsr(0x201, msr);
-#endif
-
 #if defined(XIP_ROM_SIZE)
         /* enable write through caching so we can do execute in place
          * on the flash rom.