romcc:

- Set __PRE_RAM__ define per default
- Properly handle ignored (#ifdef'd out) #include lines

amd/serengeti_cheetah_fam10:
- write ACPI files to $(obj) instead of the top dir (alias $(CURDIR))

tinybootblock:
- provide a way to define code that should be added to the bootblock,
  to map the entire ROM for use by CBFS

amd/model_fxx, amd/model_10xxx:
- add CONFIG_SSE

walkcbfs.S:
- eliminate the use of two registers, to make space for romcc to wiggle

amd/serengeti_cheetah_fam10:
- use the enable_rom framework. not entirely functional yet

Boot-tested on emulation/qemu-x86
Build-tested on amd/serengeti_cheetah_fam10
amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/arch/i386/Kconfig b/src/arch/i386/Kconfig
index 19bd63a0d490d60c85ded27cd8e3eb25ae87a03e..1d01d09263968228e26e98d3dd6dc43371ddebc4 100644 (file)
--- a/src/arch/i386/Kconfig
+++ b/src/arch/i386/Kconfig
@@ -43,3 +43,9 @@ config MAX_REBOOT_CNT
 config TINY_BOOTBLOCK
        bool
        default n
+
+config BOOTBLOCK_NORTHBRIDGE_INIT
+       string
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+       string

diff --git a/src/arch/i386/Makefile.tinybootblock.inc b/src/arch/i386/Makefile.tinybootblock.inc
index 86a71a8b7e9f81efca4fd588b2e5103ef9e397cc..a3f38ce0716b00e4553f66fafb3e1730417bce93 100644 (file)
--- a/src/arch/i386/Makefile.tinybootblock.inc
+++ b/src/arch/i386/Makefile.tinybootblock.inc
@@ -30,9 +30,17 @@ bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
 bootblock_inc += $(src)/arch/i386/lib/id.inc
+ifeq ($(CONFIG_SSE),y)
+bootblock_inc += $(src)/cpu/x86/sse_enable.inc
+endif
 bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
 bootblock_inc += $(src)/arch/i386/lib/walkcbfs.S
 
+bootblock_romccflags := -mcpu=i386
+ifeq ($(CONFIG_SSE),y)
+bootblock_romccflags := -mcpu=k7 -msse
+endif
+
 $(obj)/bootblock/ldscript.ld: $(bootblock_ldscripts) $(obj)/ldoptions
        mkdir -p $(obj)/bootblock
        printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
@@ -48,7 +56,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.c
        $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(obj)/romcc $(src)/arch/i386/init/bootblock.c
-       $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/arch/i386/init/bootblock.c -o $@
+       $(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES) $(src)/arch/i386/init/bootblock.c -o $@
 
 $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
        @printf "    LINK       $(subst $(obj)/,,$(@))\n"

diff --git a/src/arch/i386/init/bootblock.c b/src/arch/i386/init/bootblock.c
index eea0198d00e34f53faddf071c1fc80ed849b39b0..3cafef58f352b1816a6fef899e4ee11685a147e0 100644 (file)
--- a/src/arch/i386/init/bootblock.c
+++ b/src/arch/i386/init/bootblock.c
@@ -1,24 +1,46 @@
+#if CONFIG_LOGICAL_CPUS && \
+ (defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT))
+#include <cpu/x86/lapic/boot_cpu.c>
+#else
+#define boot_cpu(x) 1
+#endif
+
+#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#else
+static void bootblock_northbridge_init(void) { }
+#endif
+#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+#else
+static void bootblock_southbridge_init(void) { }
+#endif
+
 static unsigned long findstage(char* target)
 {
        unsigned long entry;
        asm volatile (
                "mov $1f, %%esp\n\t"
                "jmp walkcbfs\n\t"
-               "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edx", "edi", "ebp", "esp");
+               "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp");
        return entry;
 }
 
-static void call(unsigned long addr)
+static void call(unsigned long addr, unsigned long bist)
 {
-       asm volatile ("jmp %0\n\t" : : "r" (addr));
+       asm volatile ("jmp %0\n\t" : : "r" (addr), "a" (bist));
 }
 
-static void main(void)
+static void main(unsigned long bist)
 {
+       if (boot_cpu()) {
+               bootblock_northbridge_init();
+               bootblock_southbridge_init();
+       }
        const char* target1 = "fallback/romstage";
        unsigned long entry;
        entry = findstage(target1);
-       if (entry) call(entry);
+       if (entry) call(entry, bist);
        asm volatile ("1:\n\thlt\n\tjmp 1b\n\t");
 }
 

diff --git a/src/arch/i386/lib/walkcbfs.S b/src/arch/i386/lib/walkcbfs.S
index aba0453d1f46e69d278ecc42085cf715b079aa86..d043af5690e73e0b40445bc38c2248e0c85e69b2 100644 (file)
--- a/src/arch/i386/lib/walkcbfs.S
+++ b/src/arch/i386/lib/walkcbfs.S
@@ -25,18 +25,9 @@
   input %esi: filename
   input %esp: return address (not pointer to return address!)
   output %eax: entry point
-  clobbers %ebx, %ecx, %edx, %edi, %ebp
+  clobbers %ebx, %ecx, %edi
 */
 walkcbfs:
-       mov %esi, %ebp /* stash away filename pointer */
-       mov $0, %edx
-1:
-       cmpb $0, (%edx,%esi)
-       jz 2f
-       add $1, %edx
-       jmp 1b
-2:
-       add $1, %edx
        mov CBFS_HEADER_PTR, %eax
        mov CBFS_HEADER_ROMSIZE(%eax), %ecx
        bswap %ecx
@@ -45,15 +36,20 @@ walkcbfs:
        mov CBFS_HEADER_OFFSET(%eax), %ecx
        bswap %ecx
        add %ecx, %ebx
-       mov CBFS_HEADER_ALIGN(%eax), %eax
-       bswap %eax
-       sub $1, %eax
 
+       /* determine filename length */
+       mov $0, %eax
+1:
+       cmpb $0, (%eax,%esi)
+       jz 2f
+       add $1, %eax
+       jmp 1b
+2:
+       add $1, %eax
 walker:
-       mov %ebp, %esi
        mov %ebx, %edi
        add $CBFS_FILE_STRUCTSIZE, %edi /* edi = address of first byte after struct cbfs_file */
-       mov %edx, %ecx
+       mov %eax, %ecx
        repe cmpsb
        # zero flag set if strings are equal
        jnz tryharder
@@ -67,21 +63,29 @@ walker:
        jmp *%esp
 
 tryharder:
+       sub %ebx, %edi /* edi = # of walked bytes */
+       sub %edi, %esi /* esi = start of filename */
+
+       /* ebx = ecx = (current+offset+len+ALIGN-1) & ~(ALIGN-1) */
        mov CBFS_FILE_OFFSET(%ebx), %ecx
        bswap %ecx
        add %ebx, %ecx
        mov CBFS_FILE_LEN(%ebx), %edi
        bswap %edi
        add %edi, %ecx
-       add %eax, %ecx
-       mov %eax, %edi
+       mov CBFS_HEADER_PTR, %ebx
+       mov CBFS_HEADER_ALIGN(%ebx), %ebx
+       bswap %ebx
+       sub $1, %ebx
+       add %ebx, %ecx
+       mov %ebx, %edi
        not %edi
        and %edi, %ecx
        mov %ecx, %ebx
 
        /* look if we should exit */
-       mov CBFS_HEADER_PTR, %esi
-       mov CBFS_HEADER_ROMSIZE(%esi), %ecx
+       mov CBFS_HEADER_PTR, %ecx
+       mov CBFS_HEADER_ROMSIZE(%ecx), %ecx
        bswap %ecx
        not %ecx
        add $1, %ecx

diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index e1fc1a436af6c12f2530c30cba934fe9681c0ad1..c765eba49005dc38686074deb46901839ff910dc 100644 (file)
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -3,6 +3,7 @@ config CPU_AMD_MODEL_10XXX
        select HAVE_MOVNTI
        select USE_PRINTK_IN_CAR
        select USE_DCACHE_RAM
+       select SSE
 
 config CPU_ADDR_BITS
        int

diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index e6d94151aaa1f9d19bf2ad16dfc4bcdeebec1a31..3132fb9e73aa1d8102a65bb8485b7a2d6fa0275f 100644 (file)
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -3,6 +3,7 @@ config CPU_AMD_MODEL_FXX
        select HAVE_MOVNTI
        select USE_PRINTK_IN_CAR
        select USE_DCACHE_RAM
+       select SSE
 
 config CPU_ADDR_BITS
        int

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
index 9a2ec2d2ecccf07068c8bf88ccc381f381362895..777d846cc01bf78a7c71a8f143f12e3eca859b63 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -20,6 +20,7 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10
        select BOARD_ROMSIZE_KB_1024
        select ENABLE_APIC_EXT_ID
        select LIFT_BSP_APIC_ID
+       select TINY_BOOTBLOCK
 
 config MAINBOARD_DIR
        string
@@ -127,3 +128,12 @@ config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
        default 0x1022
        depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
+config RAMBASE
+       hex
+       default 0x200000
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ID_SECTION_OFFSET
+       hex
+       default 0x80
+       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
index 617750e905613a8c57548a70b69d61eb37c1d14f..a84a7ff9ae08bb8eee23b36c09fd78a4c169e6cf 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -41,17 +41,12 @@ driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
 
 initobj-y += crt0.o
 # FIXME in $(top)/Makefile
-crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
 crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
-crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
-crt0-y += ../../../../src/arch/i386/lib/id.inc
 crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
 crt0-y += auto.inc
 
 ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
-ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
-ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
-ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/cpu/x86/32bit/entry32.lds
 ldscript-y += ../../../../src/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION

diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index aa344c646e4d57dc3b6548603253c4b899117899..daff00a0d466f2e4168a6c89ac289dafb4b7cc7e 100644 (file)
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -52,4 +52,9 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
        default n
        depends on NORTHBRIDGE_AMD_AMDFAM10
 
+config BOOTBLOCK_NORTHBRIDGE_INIT
+        string
+        default "northbridge/amd/amdfam10/bootblock.c"
+       depends on NORTHBRIDGE_AMD_AMDFAM10
+
 source src/northbridge/amd/amdfam10/root_complex/Kconfig

diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc
index bcc7cab3d3267228f1691cd93d7baa6e1c4a6b1c..6f4c6b3ac9f72d75daf4f8f4f5eea1c056f9eb85 100644 (file)
--- a/src/northbridge/amd/amdfam10/Makefile.inc
+++ b/src/northbridge/amd/amdfam10/Makefile.inc
@@ -13,33 +13,33 @@ obj-y += get_pci1234.o
 
 ifdef POST_EVALUATION
 $(obj)/northbridge/amd/amdfam10/ssdt.c: $(src)/northbridge/amd/amdfam10/ssdt.dsl
-       iasl -p $(CURDIR)/ssdt -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex
-       mv ssdt.hex $@
+       iasl -p $(obj)/ssdt -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_ssdt/g' $(obj)/ssdt.hex
+       mv $(obj)/ssdt.hex $@
 
 $(obj)/northbridge/amd/amdfam10/sspr1.c: $(src)/northbridge/amd/amdfam10/sspr1.dsl
-       iasl -p $(CURDIR)/sspr1 -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex
-       mv sspr1.hex $@
+       iasl -p $(obj)/sspr1 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr1/g' $(obj)/sspr1.hex
+       mv $(obj)/sspr1.hex $@
 
 $(obj)/northbridge/amd/amdfam10/sspr2.c: $(src)/northbridge/amd/amdfam10/sspr2.dsl
-       iasl -p $(CURDIR)/sspr2 -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex
-       mv sspr2.hex $@
+       iasl -p $(obj)/sspr2 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr2/g' $(obj)/sspr2.hex
+       mv $(obj)/sspr2.hex $@
 
 $(obj)/northbridge/amd/amdfam10/sspr3.c: $(src)/northbridge/amd/amdfam10/sspr3.dsl
-       iasl -p $(CURDIR)/sspr3 -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex
-       mv sspr3.hex $@
+       iasl -p $(obj)/sspr3 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr3/g' $(obj)/sspr3.hex
+       mv $(obj)/sspr3.hex $@
 
 $(obj)/northbridge/amd/amdfam10/sspr4.c: $(src)/northbridge/amd/amdfam10/sspr4.dsl
-       iasl -p $(CURDIR)/sspr4 -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex
-       mv sspr4.hex $@
+       iasl -p $(obj)/sspr4 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr4/g' $(obj)/sspr4.hex
+       mv $(obj)/sspr4.hex $@
 
 $(obj)/northbridge/amd/amdfam10/sspr5.c: $(src)/northbridge/amd/amdfam10/sspr5.dsl
-       iasl -p $(CURDIR)/sspr5 -tc $<
-       perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex
-       mv sspr5.hex $@
+       iasl -p $(obj)/sspr5 -tc $<
+       perl -pi -e 's/AmlCode/AmlCode_sspr5/g' $(obj)/sspr5.hex
+       mv $(obj)/sspr5.hex $@
 endif
 

diff --git a/src/northbridge/amd/amdfam10/bootblock.c b/src/northbridge/amd/amdfam10/bootblock.c
new file mode 100644 (file)
index 0000000..612004a
--- /dev/null
+++ b/src/northbridge/amd/amdfam10/bootblock.c
@@ -0,0 +1,12 @@
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include "northbridge/amd/amdfam10/early_ht.c"
+
+static void bootblock_northbridge_init(void) {
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       /* mov bsp to bus 0xff when > 8 nodes */
+       set_bsp_node_CHtExtNodeCfgEn();
+       enumerate_ht_chain();
+}

diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig
index b134e23f781e4138d2fb4c94b3e150c25f0522ee..69a2bb27a44414310d5651cdfd5aee4817ef6c05 100644 (file)
--- a/src/southbridge/amd/amd8111/Kconfig
+++ b/src/southbridge/amd/amd8111/Kconfig
@@ -20,3 +20,7 @@
 config SOUTHBRIDGE_AMD_AMD8111
        bool
 
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+        string
+        default "southbridge/amd/amd8111/bootblock.c"
+        depends on SOUTHBRIDGE_AMD_AMD8111

diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
new file mode 100644 (file)
index 0000000..72a4903
--- /dev/null
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -0,0 +1,6 @@
+#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
+
+static void bootblock_southbridge_init(void) {
+       /* Setup the rom access for 4M */
+       amd8111_enable_rom();
+}

diff --git a/util/compareboard/compareboard b/util/compareboard/compareboard
index 7fb7e5e458bb2f72359bb41244a9dab04e250524..ce16317835aa5771dbec2df535f3d18cf91ce41d 100755 (executable)
--- a/util/compareboard/compareboard
+++ b/util/compareboard/compareboard
@@ -103,8 +103,12 @@ sed \
        -e "/^CONFIG_GDB_STUB / d" \
        -e "/^CONFIG_VIDEO_MB / d" \
        -e "/^CONFIG_EXPERT / d" \
+       -e "/^CONFIG_SSE / d" \
        -e "/^CONFIG_VGA_BIOS / d" \
        -e "/^CONFIG_WARNINGS_ARE_ERRORS / d" \
+       -e "/^CONFIG_TINY_BOOTBLOCK / d" \
+       -e "/^CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT / d" \
+       -e "/^CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT / d" \
        $A/new > $A/new.filtered
 
 normalize $A/old.filtered > $A/old.normalized

diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
index 6f3a44bb70f3ecc89010f853df151af97585a187..5712f34040d2b98fc96c04bc49db95d54c5a90e8 100644 (file)
--- a/util/romcc/romcc.c
+++ b/util/romcc/romcc.c
@@ -3616,6 +3616,7 @@ static void register_builtin_macros(struct compile_state *state)
        tm = localtime(&now);
 
        register_builtin_macro(state, "__ROMCC__", VERSION_MAJOR);
+       register_builtin_macro(state, "__PRE_RAM__", VERSION_MAJOR);
        register_builtin_macro(state, "__ROMCC_MINOR__", VERSION_MINOR);
        register_builtin_macro(state, "__FILE__", "\"This should be the filename\"");
        register_builtin_macro(state, "__LINE__", "54321");
@@ -5453,6 +5454,13 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                name = 0;
 
                pp_eat(state, TOK_MINCLUDE);
+               if (if_eat(state)) {
+                       /* Find the end of the line */
+                       while((tok = raw_peek(state)) != TOK_EOL) {
+                               raw_eat(state, tok);
+                       }
+                       break;
+               }
                tok = peek(state);
                if (tok == TOK_LIT_STRING) {
                        struct token *tk;