Move mainboard specific changes to the coreboot memory table into the

mainboard specific code. (And add a hook to allow other mainboards do
a similar thing if required)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 427b978d96e421cc00f0bdaec36f8b73e2aba99a..e74e3e9fefcc0aeadbd34fc9ac9bb15ff8bbc556 100644 (file)
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -357,7 +357,8 @@ static void lb_remove_memory_range(struct lb_memory *mem,
        }
 }
 
-static void lb_add_memory_range(struct lb_memory *mem,
+/* This function is used in mainboard specific code, too */
+void lb_add_memory_range(struct lb_memory *mem,
        uint32_t type, uint64_t start, uint64_t size)
 {
        lb_remove_memory_range(mem, start, size);
@@ -447,15 +448,10 @@ unsigned long write_coreboot_table(
        lb_add_memory_range(mem, LB_MEM_TABLE, 
                rom_table_start, rom_table_end-rom_table_start);
 
-       /* AMD rs690 chip, we should remove the UMA from system memory. */
-#if (CONFIG_GFXUMA == 1) 
-       printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", 
-       uma_memory_start, uma_memory_size);
-       lb_add_memory_range(mem, LB_MEM_TABLE, 
-               uma_memory_start, uma_memory_size);
+#if (HAVE_MAINBOARD_RESOURCES == 1)
+       add_mainboard_resources(mem);
 #endif
 
-
        /* Note:
         * I assume that there is always memory at immediately after
         * the low_table_end.  This means that after I setup the coreboot table.

diff --git a/src/arch/i386/boot/coreboot_table.h b/src/arch/i386/boot/coreboot_table.h
index a5ba0f5963216ce0979e9e2f5dc1db516424766f..4c8c44a18cdbd0b33741f7d74faa3f69ea672ea6 100644 (file)
--- a/src/arch/i386/boot/coreboot_table.h
+++ b/src/arch/i386/boot/coreboot_table.h
@@ -26,4 +26,7 @@ struct lb_memory *get_lb_mem(void);
 
 extern struct cmos_option_table option_table;
 
+/* defined by mainboard.c if the mainboard requires extra resources */
+int add_mainboard_resources(struct lb_memory *mem);
+
 #endif /* COREBOOT_TABLE_H */

diff --git a/src/config/Options.lb b/src/config/Options.lb
index 5dfa013e7b2cd67f0aa3029f09336f340583b40f..2301905712bdb9a23c7a343d60c6bd7beecb5069 100644 (file)
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -1101,6 +1101,12 @@ define CONFIG_GFXUMA
         comment "GFX UMA"
 end
 
+define HAVE_MAINBOARD_RESOURCES
+       default 0
+       export always
+       comment "Enable if the mainboard/chipset requires extra entries in the memory map"
+end
+
 define CONFIG_SPLASH_GRAPHIC
        default 0
        export used

diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index e9e1b8f3decc3b8d899270f699fbc3e70a861e02..3f8e60698e16088c2184dc23ac10bdb065070ee8 100644 (file)
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -43,12 +43,6 @@
  * See also: util/lbtdump/lbtdump.c
  */
 
-/* AMD rs690 chip, declare global variables. */
-#if (CONFIG_GFXUMA == 1) 
-       unsigned long uma_memory_start, uma_memory_size;
-#endif
-       
-
 struct lb_uint64 {
        uint32_t lo;
        uint32_t hi;

diff --git a/src/mainboard/amd/dbm690t/Options.lb b/src/mainboard/amd/dbm690t/Options.lb
index cf73999a4ffa28dc7ca6e924ba5237b832e89607..b5ec9a62cf82a6df8fcb091c3f1f209c8cc76d68 100644 (file)
--- a/src/mainboard/amd/dbm690t/Options.lb
+++ b/src/mainboard/amd/dbm690t/Options.lb
@@ -91,6 +91,7 @@ uses CONFIG_USE_PRINTK_IN_CAR
 
 uses CONFIG_VIDEO_MB
 uses CONFIG_GFXUMA
+uses HAVE_MAINBOARD_RESOURCES
 
 ###
 ### Build options
@@ -299,6 +300,7 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
 
 default CONFIG_VIDEO_MB=1
 default CONFIG_GFXUMA=1
+default HAVE_MAINBOARD_RESOURCES=1
 
 ### End Options.lb
 end

diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c
index 568670f7374c75c4997ffcfb852a61e19421c991..72bf04bd296c87dd72efd9aee8306a8a843d7ba3 100644 (file)
--- a/src/mainboard/amd/dbm690t/mainboard.c
+++ b/src/mainboard/amd/dbm690t/mainboard.c
@@ -41,6 +41,8 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
 #define ADT7461_write_byte(address, val) \
        do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
 
+unsigned long uma_memory_start, uma_memory_size;
+
 /********************************************************
 * dbm690t uses a BCM5789 as on-board NIC.
 * It has a pin named LOW_POWER to enable it into LOW POWER state.
@@ -241,13 +243,24 @@ void dbm690t_enable(device_t dev)
        get_ide_dma66();
        set_thermal_config();
 }
+ 
+int add_mainboard_resources(struct lb_memory *mem)
+{
+       /* UMA is removed from system memory in the northbridge code, but
+        * in some circumstances we want the memory mentioned as reserved.
+        */
+#if (CONFIG_GFXUMA == 1) 
+       printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", 
+       uma_memory_start, uma_memory_size);
+       lb_add_memory_range(mem, LB_MEM_RESERVED, 
+               uma_memory_start, uma_memory_size);
+#endif
+}
 
 /*
 * CONFIG_CHIP_NAME defined in Option.lb.
 */
 struct chip_operations mainboard_amd_dbm690t_ops = {
-#if CONFIG_CHIP_NAME == 1
-       CHIP_NAME("AMD Dbm690t   Mainboard")
-#endif
-           .enable_dev = dbm690t_enable,
+       CHIP_NAME("AMD DBM690T   Mainboard")
+       .enable_dev = dbm690t_enable,
 };

diff --git a/src/southbridge/amd/rs690/rs690_cmn.c b/src/southbridge/amd/rs690/rs690_cmn.c
index b714dc87c5bfd3354bf6a20c410b50a691c1a063..d50a48547cf65bd128c37ad7a1f6861867f640ed 100644 (file)
--- a/src/southbridge/amd/rs690/rs690_cmn.c
+++ b/src/southbridge/amd/rs690/rs690_cmn.c
@@ -307,6 +307,8 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
 */
 void rs690_set_tom(device_t nb_dev)
 {
+       extern unsigned long uma_memory_start;
+
        /* set TOM */
        pci_write_config32(nb_dev, 0x90, uma_memory_start);
        nbmc_write_index(nb_dev, 0x1e, uma_memory_start);