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(parent: 20aad25) | patch
Correct amd persimmon romstage code for early SPI prefetch enable.
authorScott Duplichan <scott@notabs.org>
Fri, 20 May 2011 17:50:14 +0000 (17:50 +0000)
committerScott Duplichan <scott@notabs.org>
Fri, 20 May 2011 17:50:14 +0000 (17:50 +0000)
commitfb93178f13c49c786ba142b119de9245eaf5b52b
tree18f63d45eb9db4d2ad5582081c25ecb353fbf7e9tree | snapshot
parent20aad25e6e8275815cfdbf4fbb07f9317e3c4812commit | diff
Correct amd persimmon romstage code for early SPI prefetch enable.

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/mainboard/amd/persimmon/romstage.c diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)