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(parent: 061c89e) | patch
Improving BKDG implementation of P-states,
authorXavi Drudis Ferran <xdrudis@tinet.cat>
Mon, 28 Feb 2011 03:56:52 +0000 (03:56 +0000)
committerMarc Jones <marc.jones@amd.com>
Mon, 28 Feb 2011 03:56:52 +0000 (03:56 +0000)
commit6bdc83bf5e76aa0b36cb5f52c11544091d71770b
tree474451adb296e64baca29784ddf7bc87653b50d7tree | snapshot
parent061c89e15d336b92b1e9fb2f9866c32f6496fb09commit | diff
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.

I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ?

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/cpu/amd/model_10xxx/fidvid.c diff | blob | history
src/cpu/amd/model_10xxx/init_cpus.c diff | blob | history
src/northbridge/amd/amdht/AsPsDefs.h diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)