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(parent: e499036) | patch
Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.
authorUwe Hermann <uwe@hermann-uwe.de>
Fri, 15 Oct 2010 07:47:51 +0000 (07:47 +0000)
committerUwe Hermann <uwe@hermann-uwe.de>
Fri, 15 Oct 2010 07:47:51 +0000 (07:47 +0000)
commitaf8b2b91b48229d804f1f391e294467cd91adef5
tree064d85a1664eb0082e3e73ae56842c0dd10c6884tree | snapshot
parente49903650cbb8a924a18bcfa28b270f79ef398a1commit | diff
Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.

This CAR implementation hardcodes the Cache-as-RAM base address to:

  0xd0000 - CacheSize

so the DCACHE_RAM_BASE is never actually used for this implementation
and these sockets.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/cpu/intel/slot_1/Kconfig diff | blob | history
src/cpu/intel/slot_2/Kconfig diff | blob | history
src/cpu/intel/socket_FC_PGA370/Kconfig diff | blob | history
src/cpu/intel/socket_PGA370/Kconfig diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)