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(parent: 643c9e8) | patch
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26
authorFlorian Zumbiehl <florz@florz.de>
Tue, 1 Nov 2011 19:17:12 +0000 (20:17 +0100)
committerPatrick Georgi <patrick@georgi-clan.de>
Mon, 7 Nov 2011 10:40:55 +0000 (11:40 +0100)
commit7e9de01c4758cc1e8adb05d0c443701495e98fe0
tree7309778741f5ab74fb7c034a40245008c716a3bftree | snapshot
parent643c9e892fab5f73dde566b9ffb73f2f0463d9a7commit | diff
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26

Change-Id: Ic77854130ad43715daa7c0eb462291db48df9f84
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/370
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
src/northbridge/amd/amdk8/raminit_f.c diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)