mainboard via/epia-m
-option MAXIMUM_CONSOLE_LOGLEVEL=8
-option DEFAULT_CONSOLE_LOGLEVEL=8
+option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
+option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
-option ROM_SIZE=256*1024
-option HAVE_OPTION_TABLE=1
+option CONFIG_ROM_SIZE=256*1024
+option CONFIG_HAVE_OPTION_TABLE=1
option CONFIG_ROM_PAYLOAD=1
-option HAVE_FALLBACK_BOOT=1
+option CONFIG_HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
-option FALLBACK_SIZE=0x18000
+option CONFIG_FALLBACK_SIZE=0x18000
## Coreboot C code runs at this location in RAM
-option _RAMBASE=0x00004000
+option CONFIG_RAMBASE=0x00004000
###
### Compute the start location and size size of
# EPIA-M
#
romimage "normal"
- option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0xc000
- option ROM_SECTION_OFFSET=0x10000
- option ROM_SECTION_SIZE=0x18000
+ option CONFIG_USE_FALLBACK_IMAGE=0
+ option CONFIG_ROM_IMAGE_SIZE=0xc000
+ option CONFIG_ROM_SECTION_OFFSET=0x10000
+ option CONFIG_ROM_SECTION_SIZE=0x18000
option COREBOOT_EXTRA_VERSION=".0-Normal"
payload $(HOME)/svn/filo.elf
end
romimage "fallback"
- option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0xc000
+ option CONFIG_USE_FALLBACK_IMAGE=1
+ option CONFIG_ROM_IMAGE_SIZE=0xc000
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload $(HOME)/svn/filo.elf
end
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"