target s1846
mainboard tyan/s1846
-option ROM_SIZE = 256 * 1024
+option CONFIG_ROM_SIZE = 256 * 1024
-option MAINBOARD_VENDOR = "Tyan"
-option MAINBOARD_PART_NUMBER = "S1846"
+option CONFIG_MAINBOARD_VENDOR = "Tyan"
+option CONFIG_MAINBOARD_PART_NUMBER = "S1846"
# TODO: Add/fix PIRQ table.
-option HAVE_PIRQ_TABLE = 0
-option IRQ_SLOT_COUNT = 0 # FIXME
+option CONFIG_HAVE_PIRQ_TABLE = 0
+option CONFIG_IRQ_SLOT_COUNT = 0 # FIXME
-option DEFAULT_CONSOLE_LOGLEVEL = 9
-option MAXIMUM_CONSOLE_LOGLEVEL = 9
+option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
+option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
option CONFIG_CONSOLE_VGA = 1
option CONFIG_PCI_ROM_RUN = 1
romimage "normal"
- option USE_FALLBACK_IMAGE = 0
+ option CONFIG_USE_FALLBACK_IMAGE = 0
option COREBOOT_EXTRA_VERSION = ".0Normal"
payload /tmp/filo.elf
end
romimage "fallback"
- option USE_FALLBACK_IMAGE = 1
+ option CONFIG_USE_FALLBACK_IMAGE = 1
option COREBOOT_EXTRA_VERSION = ".0Fallback"
payload /tmp/filo.elf
end
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"