Update AMD F14 Agesa to support Rev C0 cpus

[coreboot.git] / src / vendorcode / amd / agesa / f14 / Proc / CPU / Family / 0x10 / RevC / F10RevCHwC1e.c

diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c
index d92bf99026ccc2e440d4a77cadcfa78c3c3c59cb..3c3fa89463756f8f3f0242ff0a9b3c198733f8e5 100644 (file)
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c
@@ -134,18 +134,18 @@ F10InitializeHwC1e (
   IN       AMD_CONFIG_PARAMS *StdHeader
   )
 {
-  UINT64 MsrRegister;
+  UINT64 MsrReg;
   AP_TASK TaskPtr;
 
-  MsrRegister = 0;
-  ((INTPEND_MSR *) &MsrRegister)->IoMsgAddr = PlatformConfig->C1ePlatformData;
-  ((INTPEND_MSR *) &MsrRegister)->IoRd = 1;
-  ((INTPEND_MSR *) &MsrRegister)->C1eOnCmpHalt = 1;
-  ((INTPEND_MSR *) &MsrRegister)->SmiOnCmpHalt = 0;
+  MsrReg = 0;
+  ((INTPEND_MSR *) &MsrReg)->IoMsgAddr = PlatformConfig->C1ePlatformData;
+  ((INTPEND_MSR *) &MsrReg)->IoRd = 1;
+  ((INTPEND_MSR *) &MsrReg)->C1eOnCmpHalt = 1;
+  ((INTPEND_MSR *) &MsrReg)->SmiOnCmpHalt = 0;
 
   TaskPtr.FuncAddress.PfApTaskI = F10InitializeHwC1eOnCore;
   TaskPtr.DataTransfer.DataSizeInDwords = 2;
-  TaskPtr.DataTransfer.DataPtr = &MsrRegister;
+  TaskPtr.DataTransfer.DataPtr = &MsrReg;
   TaskPtr.DataTransfer.DataTransferFlags = 0;
   TaskPtr.ExeFlags = WAIT_FOR_CORE;
   ApUtilRunCodeOnAllLocalCoresAtEarly (&TaskPtr, StdHeader, NULL);
@@ -168,16 +168,16 @@ F10InitializeHwC1eOnCore (
   IN       AMD_CONFIG_PARAMS *StdHeader
   )
 {
-  UINT64  MsrRegister;
+  UINT64  MsrReg;
 
   // Enable C1e
   LibAmdMsrWrite (MSR_INTPEND, (UINT64 *) IntPendMsr, StdHeader);
 
   // Set OS Visible Workaround Status BIT1 to indicate that C1e
   // is enabled.
-  LibAmdMsrRead (MSR_OSVW_Status, &MsrRegister, StdHeader);
-  MsrRegister |= BIT1;
-  LibAmdMsrWrite (MSR_OSVW_Status, &MsrRegister, StdHeader);
+  LibAmdMsrRead (MSR_OSVW_Status, &MsrReg, StdHeader);
+  MsrReg |= BIT1;
+  LibAmdMsrWrite (MSR_OSVW_Status, &MsrReg, StdHeader);
 }