CMOS: Add set_option and rework get_option.
[coreboot.git] / src / southbridge / sis / sis966 / sis966_lpc.c
index 4e1b3cd5bc308fb5a02ac8768138e1b777ffb29c..dff64094782bc2e6519fed46cdcf0b424ce84bac 100644 (file)
@@ -167,8 +167,8 @@ static void lpc_init(device_t dev)
 {
         uint8_t byte;
         uint8_t byte_old;
-        int on;
-        int nmi_option;
+        uint32_t on;
+        uint32_t nmi_option;
 
         printk_debug("LPC_INIT -------->\n");
         init_pc_keyboard(0x60, 0x64, 0);
@@ -180,7 +180,7 @@ static void lpc_init(device_t dev)
 
 
        on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
-       get_option(&on, "power_on_after_fail");
+       get_option("power_on_after_fail", &on);
        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
        byte &= ~0x40;
        if (!on) {
@@ -191,7 +191,7 @@ static void lpc_init(device_t dev)
 
        /* Throttle the CPU speed down for testing */
        on = SLOW_CPU_OFF;
-       get_option(&on, "slow_cpu");
+       get_option("slow_cpu", &on);
        if(on) {
                uint16_t pm10_bar;
                uint32_t dword;
@@ -213,7 +213,7 @@ static void lpc_init(device_t dev)
         byte = inb(0x70); // RTC70
         byte_old = byte;
         nmi_option = NMI_OFF;
-        get_option(&nmi_option, "nmi");
+        get_option("nmi", &nmi_option);
         if (nmi_option) {
                 byte &= ~(1 << 7); /* set NMI */
         } else {