This is a general cleanup patch

[coreboot.git] / src / southbridge / intel / i82801gx / i82801gx.h

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 1f320c51827601632a8d301ba61e2577ac40baee..3ae440d56881f91782162951f0b9205a550d094e 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -47,6 +47,24 @@
 extern void i82801gx_enable(device_t dev);
 #endif
 
+#define MAINBOARD_POWER_OFF    0
+#define MAINBOARD_POWER_ON     1
+#define MAINBOARD_POWER_KEEP   2
+
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#endif
+
+/* PCI Configuration Space (D30:F0): PCI2PCI */
+#define PSTS   0x06
+#define SMLT   0x1b
+#define SECSTS 0x1e
+#define INTR   0x3c
+#define BCTRL  0x3e
+#define   SBR  (1 << 6)
+#define   SEE  (1 << 1)
+#define   PERE (1 << 0)
+
 /* PCI Configuration Space (D31:F0): LPC */
 
 #define SERIRQ_CNTL            0x64