First round of ICH2/ICH2-M cleanups after split from i82801xx.

[coreboot.git] / src / southbridge / intel / i82801bx / chip.h

diff --git a/src/southbridge/intel/i82801bx/chip.h b/src/southbridge/intel/i82801bx/chip.h
index a168e8502ec864ee5312a477d03ae2ad9481c78c..5cdfc5da50bebb9fdf5e05a9bd53fd6dbe467fc7 100644 (file)
--- a/src/southbridge/intel/i82801bx/chip.h
+++ b/src/southbridge/intel/i82801bx/chip.h
@@ -19,38 +19,26 @@
  */
 
 /*
- * The i82801bx code currently supports:
- *  - 82801AA
- *  - 82801AB
- *  - 82801BA
- *  - 82801CA
- *  - 82801DB
- *  - 82801DBM
- *  - 82801EB
- *  - 82801ER
- *
- * This code should NOT be used for ICH6 and later versions.
+ * The i82801bx code supports: 82801BA/82801BAM (ICH2/ICH2-M)
  */
 
 #ifndef SOUTHBRIDGE_INTEL_I82801BX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I82801BX_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_i82801bx_config {
-       /**
-        * Interrupt Routing configuration
-        * If bit7 is 1, the interrupt is disabled.
-        */
-       uint8_t pirqa_routing;
-       uint8_t pirqb_routing;
-       uint8_t pirqc_routing;
-       uint8_t pirqd_routing;
-       uint8_t pirqe_routing;
-       uint8_t pirqf_routing;
-       uint8_t pirqg_routing;
-       uint8_t pirqh_routing;
+       u8 pirqa_routing;
+       u8 pirqb_routing;
+       u8 pirqc_routing;
+       u8 pirqd_routing;
+       u8 pirqe_routing;
+       u8 pirqf_routing;
+       u8 pirqg_routing;
+       u8 pirqh_routing;
 
-       uint8_t ide0_enable;
-       uint8_t ide1_enable;
+       u8 ide0_enable;
+       u8 ide1_enable;
 };
 
 extern struct chip_operations southbridge_intel_i82801bx_ops;