Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early only Seria...

[coreboot.git] / src / southbridge / amd / sb600 / lpc.c

diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c
index 6a17f72318cef9d38987aef94440498e75e5a8f5..6f16ea81c70b9625ff24a802dfb8e6883271a8bd 100644 (file)
--- a/src/southbridge/amd/sb600/lpc.c
+++ b/src/southbridge/amd/sb600/lpc.c
@@ -103,7 +103,8 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
        struct bus *link;
        u32 reg, reg_x;
        int var_num = 0;
-       u16 reg_var[3];
+       u16 reg_var[3] = {0x0, 0x0, 0x0};
+       u8 wiosize = pci_read_config8(dev, 0x74);
 
        reg = pci_read_config32(dev, 0x44);
        reg_x = pci_read_config32(dev, 0x48);
@@ -134,13 +135,14 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
                                        case 0x2f8:     /*  COM2 */
                                                reg |= (1 << 7);
                                                break;
-                                       case 0x378:     /*  Parallal 1 */
+                                       case 0x378:     /*  Parallel 1 */
                                                reg |= (1 << 0);
+                                               reg |= (1 << 1); /* + 0x778 for ECP */
                                                break;
                                        case 0x3f0:     /*  FD0 */
                                                reg |= (1 << 26);
                                                break;
-                                       case 0x220:     /*  Aduio 0 */
+                                       case 0x220:     /*  Audio 0 */
                                                reg |= (1 << 8);
                                                break;
                                        case 0x300:     /*  Midi 0 */
@@ -170,12 +172,19 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
                                                switch (var_num) {
                                                case 0:
                                                        reg_x |= (1 << 2);
+                                                       if ((end - base) < 16)
+                                                               wiosize |= (1 << 0);
                                                        break;
                                                case 1:
                                                        reg_x |= (1 << 24);
+                                                       if ((end - base) < 16)
+                                                               wiosize |= (1 << 2);
                                                        break;
                                                case 2:
                                                        reg_x |= (1 << 25);
+                                                       reg_x |= (1 << 24);
+                                                       if ((end - base) < 16)
+                                                               wiosize |= (1 << 3);
                                                        break;
                                                }
                                                reg_var[var_num++] =
@@ -197,6 +206,7 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
                pci_write_config16(dev, 0x64, reg_var[0]);
                break;
        }
+       pci_write_config8(dev, 0x74, wiosize);
 }
 
 static void sb600_lpc_enable_resources(device_t dev)