This is a general cleanup patch

[coreboot.git] / src / northbridge / intel / i945 / northbridge.c

diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 4ccffc6b559b317e14086dd4ac557ae28a0c4197..5f71e19a9096a986e97bc55a3ab83a698a929669 100644 (file)
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -31,8 +31,9 @@
 #include <boot/tables.h>
 #include "chip.h"
 #include "i945.h"
+#include <arch/coreboot_tables.h>
 
-int get_pcie_bar(u32 *base, u32 *len)
+static int get_pcie_bar(u32 *base, u32 *len)
 {
        device_t dev;
        u32 pciexbar_reg;