This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / northbridge / intel / e7520 / northbridge.c

diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index f2b2a0f3a0f2ba42613d484ddaa65eccd2e88ed6..47e6266aa6e77be0a74575dd9b7f1010cd2b9703 100644 (file)
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -76,7 +76,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
        return tolm;
 }
 
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
 #define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
 extern uint64_t high_tables_base, high_tables_size;
 #endif
@@ -169,7 +169,7 @@ static void pci_domain_set_resources(device_t dev)
                                (remaplimitk + 64*1024) - remapbasek);
                }
 
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
                /* Leave some space for ACPI, PIRQ and MP tables */
                high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
                high_tables_size = HIGH_TABLES_SIZE * 1024;