This patch sets max freq defaults for ddr2 and ddr3for fam10.

[coreboot.git] / src / northbridge / amd / amdmct / wrappers / mcti.h

diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h
index 357f2cb9bcd73cae94ea910e5bdc9761f32252fd..9c948fe2a188a667a74e641a4c7103bf9c53580b 100644 (file)
--- a/src/northbridge/amd/amdmct/wrappers/mcti.h
+++ b/src/northbridge/amd/amdmct/wrappers/mcti.h
@@ -57,6 +57,18 @@ UPDATE AS NEEDED
 #define MAX_CS_SUPPORTED               8
 #endif
 
+#ifndef MCT_DIMM_SPARE_NO_WARM
+#define MCT_DIMM_SPARE_NO_WARM 0
+#endif
+
+#ifndef MEM_MAX_LOAD_FREQ
+#if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
+ #define MEM_MAX_LOAD_FREQ             800
+#else
+ #define MEM_MAX_LOAD_FREQ             400
+#endif
+#endif
+
 #define MCT_TRNG_KEEPOUT_START         0x00000C00
 #define MCT_TRNG_KEEPOUT_END           0x00000CFF