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[coreboot.git] / src / northbridge / amd / amdfam10 / northbridge.c

diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index f8c8f26439dff655dfd67fefa0c1ad2436099fac..018b6c83b0d8e81dc3be08340885918f266e1b5b 100644 (file)
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -47,6 +47,11 @@
 #endif
 
 #include <cpu/amd/amdfam10_sysconf.h>
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800
+#include <sb_cimx.h>
+#elif CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
+#include <SbEarly.h>
+#endif
 
 struct amdfam10_sysconf_t sysconf;
 
@@ -124,7 +129,7 @@ static u32 amdfam10_nodeid(device_t dev)
 #endif
 }
 
-#include "amdfam10_conf.c"
+#include "conf.c"
 
 static void set_vga_enable_reg(u32 nodeid, u32 linkn)
 {
@@ -545,13 +550,9 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource,
 }
 
 /**
- *
  * I tried to reuse the resource allocation code in amdfam10_set_resource()
- * but it is too diffcult to deal with the resource allocation magic.
+ * but it is too difficult to deal with the resource allocation magic.
  */
-#if CONFIG_CONSOLE_VGA_MULTI == 1
-extern device_t vga_pri;       // the primary vga device, defined in device.c
-#endif
 
 static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid)
 {
@@ -561,7 +562,8 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid)
         * we only deal with the 'first' vga card */
        for (link = dev->link_list; link; link = link->next) {
                if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_CONSOLE_VGA_MULTI == 1
+#if CONFIG_MULTIPLE_VGA_ADAPTERS == 1
+                       extern device_t vga_pri; // the primary vga device, defined in device.c
                        printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
                                link->secondary,link->subordinate);
                        /* We need to make sure the vga_pri is under the link */
@@ -687,6 +689,13 @@ static void amdfam10_domain_read_resources(device_t dev)
                resource->flags = IORESOURCE_MEM;
        }
 #endif
+#if CONFIG_MMCONF_SUPPORT
+       struct resource *res = new_resource(dev, 0xc0010058);
+       res->base = CONFIG_MMCONF_BASE_ADDRESS;
+       res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
+       res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+               IORESOURCE_FIXED | IORESOURCE_STORED |  IORESOURCE_ASSIGNED;
+#endif
 }
 
 static u32 my_find_pci_tolm(struct bus *bus, u32 tolm)
@@ -837,8 +846,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
 #endif
 
 #if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
 #endif
 
 #if CONFIG_GFXUMA == 1
@@ -1029,13 +1037,13 @@ static void amdfam10_domain_set_resources(device_t dev)
                                        if (high_tables_base==0) {
                                        /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA == 1
-                                               high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+                                               high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
 #else
-                                               high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+                                               high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
 #endif
-                                               high_tables_size = HIGH_TABLES_SIZE * 1024;
-                                               printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
-                                                            high_tables_base);
+                                               high_tables_size = HIGH_MEMORY_SIZE;
+                                               printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
+                                                       HIGH_MEMORY_SIZE / 1024, high_tables_base);
                                        }
 #endif
                                }
@@ -1060,6 +1068,12 @@ static void amdfam10_domain_set_resources(device_t dev)
                                sizek -= (4*1024*1024 - mmio_basek);
                        }
                }
+
+#if CONFIG_GFXUMA == 1
+               /* Deduct uma memory before reporting because
+                * this is what the mtrr code expects */
+               sizek -= uma_memory_size / 1024;
+#endif
                ram_resource(dev, (idx | i), basek, sizek);
                idx += 0x10;
 #if CONFIG_WRITE_HIGH_TABLES==1
@@ -1068,11 +1082,11 @@ static void amdfam10_domain_set_resources(device_t dev)
                if (high_tables_base==0) {
                /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA == 1
-                       high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+                       high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
 #else
-                       high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+                       high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
 #endif
-                       high_tables_size = HIGH_TABLES_SIZE * 1024;
+                       high_tables_size = HIGH_MEMORY_SIZE;
                }
 #endif
        }
@@ -1436,6 +1450,10 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
 static void cpu_bus_init(device_t dev)
 {
        initialize_cpus(dev->link_list);
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 || CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
+       sb_After_Pci_Init();
+       sb_Mid_Post_Init();
+#endif
 }
 
 static void cpu_bus_noop(device_t dev)
@@ -1444,13 +1462,6 @@ static void cpu_bus_noop(device_t dev)
 
 static void cpu_bus_read_resources(device_t dev)
 {
-#if CONFIG_MMCONF_SUPPORT
-       struct resource *resource = new_resource(dev, 0xc0010058);
-       resource->base = CONFIG_MMCONF_BASE_ADDRESS;
-       resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
-       resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
-               IORESOURCE_FIXED | IORESOURCE_STORED |  IORESOURCE_ASSIGNED;
-#endif
 }
 
 static void cpu_bus_set_resources(device_t dev)