sigh
[coreboot.git] / src / northbridge / amd / amdfam10 / northbridge.c
index 89bd6733ce26e85821901981f28a17976b7b820e..018b6c83b0d8e81dc3be08340885918f266e1b5b 100644 (file)
 #endif
 
 #include <cpu/amd/amdfam10_sysconf.h>
-#if CONFIG_AMD_SB_CIMX
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800
 #include <sb_cimx.h>
+#elif CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
+#include <SbEarly.h>
 #endif
 
 struct amdfam10_sysconf_t sysconf;
@@ -1448,7 +1450,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
 static void cpu_bus_init(device_t dev)
 {
        initialize_cpus(dev->link_list);
-#if CONFIG_AMD_SB_CIMX
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 || CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
        sb_After_Pci_Init();
        sb_Mid_Post_Init();
 #endif