We call this cache as ram everywhere, so let's call it the same in Kconfig
[coreboot.git] / src / mainboard / wyse / s50 / Kconfig
index 22514c36a29e91ae075e1812c8bb179b172f869f..805748a2a319c64c01a18c8cc425779afeeabbf0 100644 (file)
@@ -25,7 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select NORTHBRIDGE_AMD_GX2
        select SOUTHBRIDGE_AMD_CS5536
        select UDELAY_TSC
-       select USE_DCACHE_RAM
+       select CACHE_AS_RAM
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select BOARD_ROMSIZE_KB_256