Tyan update to work with new CPU Config

[coreboot.git] / src / mainboard / tyan / s2885 / mptable.c

diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index d9477e2966e8631c2388e6888ada0f667b79ed7c..b5095a6cce4fa88c47546d931068da1e5ab7e84a 100644 (file)
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -4,7 +4,7 @@
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v, unsigned long * processor_map)
+void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
         static const char oem[8] = "TYAN    ";
@@ -37,7 +37,7 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
         mc->mpe_checksum = 0;
         mc->reserved = 0;
 
-        smp_write_processors(mc, processor_map);
+        smp_write_processors(mc);
 
        {
                 device_t dev;
@@ -107,19 +107,21 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 /*I/O APICs:   APIC ID Version State           Address*/
        smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
         {
-                struct pci_dev *dev;
-                uint32_t base;
+                device_t dev;
+               struct resource *res;
                 dev = dev_find_slot(3, PCI_DEVFN(0x1,1));
                 if (dev) {
-                        base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
-                        base &= PCI_BASE_ADDRESS_MEM_MASK;
-                        smp_write_ioapic(mc, 3, 0x11, base);
+                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
+                       if (res) {
+                               smp_write_ioapic(mc, 0x03, 0x11, res->base);
+                       }
                 }
                 dev = dev_find_slot(3, PCI_DEVFN(0x2,1));
                 if (dev) {
-                        base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
-                        base &= PCI_BASE_ADDRESS_MEM_MASK;
-                        smp_write_ioapic(mc, 4, 0x11, base);
+                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
+                       if (res) {
+                               smp_write_ioapic(mc, 0x04, 0x11, res->base);
+                       }
                 }
        }
   
@@ -197,9 +199,9 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
        return smp_next_mpe_entry(mc);
 }
 
-unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map)
+unsigned long write_smp_table(unsigned long addr)
 {
        void *v;
        v = smp_write_floating_table(addr);
-       return (unsigned long)smp_write_config_table(v, processor_map);
+       return (unsigned long)smp_write_config_table(v);
 }