Winbond W83627HF: Use existing functions instead of open-coding.

[coreboot.git] / src / mainboard / supermicro / x6dhr_ig2 / romstage.c

diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 5e54fa66fa179d7794afd89d7e9a8f05ae65f984..eb54ef563240d343866072c6775ff8eed1db9b61 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -15,13 +15,14 @@
 #include "watchdog.c"
 #include "reset.c"
 #include "x6dhr2_fixups.c"
-#include "superio/winbond/w83627hf/w83627hf_early_init.c"
+#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
 #include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define HIDDEN_SERIAL_DEV  PNP_DEV(0x2e, W83627HF_SP2)
+#define DUMMY_DEV PNP_DEV(0x2e, 0)
 
 #define DEVPRES_CONFIG  ( \
        DEVPRES_D0F0 | \
@@ -59,11 +60,8 @@ static void main(unsigned long bist)
                        skip_romstage();
        }
 
-       /* Setup the console */
-       outb(0x87,0x2e);
-       outb(0x87,0x2e);
-       pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
-       w83627hf_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
+       w83627hf_set_clksel_48(DUMMY_DEV);
+       w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
        console_init();